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How to configure the CC2530 DMA Channels 1-4 separately ?

ZEO ZHAO
Prodigy 100 points
Other Parts Discussed in Thread: CC2530

Hi, I m working on my project with CC2530 SMART-RF 05  DTK,

In my case, Four DMA channels should be used after trigered by ADC sequence, 

And here is the problem,  the configuration of DMA Channels 1-4 really confuse me a lot, in the fonction  "DMA_SET_ADDR_DESC1234(a)"  it is

#define DMA_SET_ADDR_DESC1234(a)        \
   do{                                  \
      DMA1CFGH = (BYTE)( (WORD)a >> 8 );\
      DMA1CFGL = (BYTE)( (WORD)a );     \
   } while(0)

and in the iocc2530.h files, I can't find the DMA2CFGH etc, it is 

SFR(  DMA1CFGL  ,  0xD2  )   /*  DMA Channel 1-4 Configuration Address Low Byte     */
SFR(  DMA1CFGH  ,  0xD3  )   /*  DMA Channel 1-4 Configuration Address High Byte    */
SFR(  DMA0CFGL  ,  0xD4  )   /*  DMA Channel 0 Configuration Address Low Byte       */
SFR(  DMA0CFGH  ,  0xD5  )   /*  DMA Channel 0 Configuration Address High Byte    

there is no problem to use the DMA Channel 0 and Channel 1, but ,how to configur the DMA Channel 2,3,4??

Thank you so much,

  • 0
    TI__Genius 10955 points

    This is explained in Section 8.3 of the CC253x User Guide (http://www.ti.com/litv/pdf/swru191b):

    DMA1CFGH:DMA1CFGL gives the start address for the DMA channel 1 configuration data structure, followed by the channel 2–4 configuration data structures.

    Thus, the DMA controller expects the DMA configuration data structures for DMA channels 1–4 to lie in a contiguous area in memory starting at the address held in DMA1CFGH:DMA1CFGL and consisting of 32 bytes.

    In other words, if you run DMA_SET_ADDR_DESC1234(a), the configuration for channel 1 will be at address a, the configuration for channel 2 will be at a+8, the configuration for channel 3 at a+16, and the configuration for channel 4 at a+24.

  • 0 in reply to hec
    Prodigy 100 points

    hec said:

    This is explained in Section 8.3 of the CC253x User Guide (http://www.ti.com/litv/pdf/swru191b):

    DMA1CFGH:DMA1CFGL gives the start address for the DMA channel 1 configuration data structure, followed by the channel 2–4 configuration data structures.

    Thus, the DMA controller expects the DMA configuration data structures for DMA channels 1–4 to lie in a contiguous area in memory starting at the address held in DMA1CFGH:DMA1CFGL and consisting of 32 bytes.

    In other words, if you run DMA_SET_ADDR_DESC1234(a), the configuration for channel 1 will be at address a, the configuration for channel 2 will be at a+8, the configuration for channel 3 at a+16, and the configuration for channel 4 at a+24.

    Thank you so much,

    I enventually work it out with 2 channels, it works perfectly, and I will use your method to try 4 channels,

    Thx again