Why GPIO set/ clear taking more time (2-3 cycles)

lakshmi komali

HI all,

I am working on DAC interfacing with EzDSP-F28335 Evaluation board.

For 4-channel DAC configuration, I need to toggle the GPIO port pins accordingly to provide address of channel for

writing data to a particular channel. For selecting the channel I have implemented 'Switch:Case'.(attached)

According to data sheet DAC write should complete with in 100nsec but it takes 1usec.(measured on oscilloscope by toggling a GPIO before and after the DAC function call)

When we start analysis then we found that GPIO is taking more time(approx 2-3 cycles: measured with CCSv4 clock cycles) for set or clear instruction.

Example: GpioDataRegs.GPASET.bit.GPIO1 = 1;

I have referred this link and changed the GPIO set and clear instructions in assembly(attached)

 http://e2e.ti.com/support/microcontrollers/c2000/f/171/t/58087.aspx

But in both cases the time it is taking to complete the DAC writing is same i.e., 1us (measured on oscilloscope by toggling a GPIO before and after the DAC function call).

Please help me to reduce the timings.

Thankyou,

Lakshmi.

over 9 years ago

0 Gautam Iyer over 9 years ago

Guru 192875 points

Hi Lakshmi,

I would like you to go through this link to get all the info on GPIO toggle timings:

http://processors.wiki.ti.com/index.php/General_Purpose_IO_%28GPIO%29_FAQ_for_C2000

Regards,

Gautam

0 lakshmi komali over 9 years ago in reply to Gautam Iyer

Intellectual 515 points

HI Gautam,

I have already gone through this information. The timings or cycles are not so clearly mentioned for GPIOSET and GPIOCLEAR.

And one more thing is the Qualification selection. I have selected to synchronize with the SYSCLKOUT which is 120MHz.

According to my knowledge GPIOSET or GPIOCLEAR should take 1 instruction cycle to execute. But it is taking 2-3 instructions.

Help me resolving this.

Regards,

Lakshmi

0 Gautam Iyer over 9 years ago in reply to lakshmi komali

Guru 192875 points

Lakshmi, yes I do agree that a toggle/set/clear take 1 instruction cycle but in your case wait-states are getting introduced. The above link clearly mentions:

In addition, back-to-back writes to this peripheral frame will introduce a wait-state. That is one toggle will take a cycle, but back to back toggles will add an additional cycle between the writes.

Regards,

Gautam

0 lakshmi komali over 9 years ago in reply to Gautam Iyer

Intellectual 515 points

Hai Gautam,

So, You mean to say that there is no way to make the GPIO Set/Clear/Toggle to execute in 1 cycle?

Thankyou,

Komali.

0 Gautam Iyer over 9 years ago in reply to lakshmi komali

Guru 192875 points

lakshmi komali said:
So, You mean to say that there is no way to make the GPIO Set/Clear/Toggle to execute in 1 cycle?

Well, we can't state (generalize) that. According to the documentations one should be able to!

Regards,

Gautam

0 Santosh Athuru over 9 years ago in reply to Gautam Iyer

TI__Mastermind 19810 points

Try runing the SET/CLEAR or the TOGGLE code from RAM and check. RAM is zero wait state.

Best Regards

Santosh

0 hai sun over 9 years ago

Prodigy 190 points

is your code stored in the flash？

debug your code and see the address of this code.make sure your code run at RAM.

there is a diff time between run from flash and from RAM.

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Why GPIO set/ clear taking more time (2-3 cycles)