• State Resolved
  • Locked Locked
  • Replies 9 replies
  • Subscribers 84 subscribers
  • Views 1327 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

ADC pins see some default voltage at ADCIN pins.

Alberto Guzzi
Prodigy 90 points

Good Afternoon

I am working on windows 7, 64 bit.

using CCS v6.1

Variant : 2833xDelfino , TMS320F28335

Connection: XDS100v1 USB Emulator

Compiler Version TI v6.4.2

I am working on ADCs and i see a very weird problem.

Even if I do not give any input at ADC pins, still the pins are at some (0.6-1)V and it varies from pin to pin in this range.

Today i supplied my ADCIN0 with a simple potential divider circuit with 0.5 V. (Input to potential divider circuit was given from a regulated power supply at 5 V)

Before giving external supply to adc pin, it was at 0.6 V. But after I supplied the pin from my potentiometer it showed voltage of 1.6V

I checked all my groundings thoroughly.

But, I am not able to understand that why ADC pins are at some voltage already.

And how can I overcome from this problem?

With Regards

  • 0
    Guru 192875 points
    Hi Alberto,

    If the ADC pins are left floating they tend to give you random values that make no sense. But after applying certain voltage the digital value should match the analog equivalent. Try grounding the pins or to 3V to get minimum and maximum digital values respectively.

    Regards,
    Gautam
  • 0 in reply to Gautam Iyer
    TI__Guru 60865 points

    Hi Alberto,

    To add a little bit to what Gautam said above:

    The voltage the ADC will actually convert into a digital value is whatever voltage is captured on the S+H capacitor (Ch in the below figure).  Even if no input is supplied to the ADC, this capacitor will have some voltage on it.  After a conversion is complete, the voltage on this capacitor will also be some unknown voltage (but it is typically near to the previous conversion voltage).  Because of this, it is recommended that you use a circuit simulator to ensure that your signal driving circuitry (in your case a resistive voltage divider) can charge Ch to within your desired error limit (usually 1/2 LSB or better) in the allocated S+H time (see the timing diagrams in the datasheet).  You will want to use worst case assumptions for the starting voltage of Ch (usually fully discharged) and the target voltage (usually full-scale, which is 3.0V for F2833x).  

  • 0 in reply to Devin Cottier
    Intellectual 780 points
    Dear Sir,

    My project has similar reference 3.3 volt to ADCIN_A7 pin.
    Besides this circuitry explanation could you kindly share any code to represent this issue?
  • 0 in reply to MD MUBDIUL HASAN
    TI__Guru 60865 points

    Hi MD,

    The only thing you can do from a SW perspective is adjust the ACQPS setting, which will increase the S+H window duration.  The increased S+H duration will allow additional settling time. 

  • 0 in reply to Devin Cottier
    Intellectual 780 points
    Dear Sir,
    Thank you.
    Does it mean in additional setting time we could introduce reference voltage?

    According to spru812a, ACQ_PS (11-8 bits of ADCTRL1) is Acquisition window size. This bit field controls the width of SOC pulse, which, in turn,
    determines for what time duration the sampling switch is closed.

    Then what does it means, AdcRegs.ADCTRL1.bit.ACQ_PS = 7;?

    what is the relation between input reference voltage to ADCIN_A7 pin and ACQ_PS?

    Let me know soon.
    Regards
    Hasan
  • 0 in reply to MD MUBDIUL HASAN
    TI__Guru 60865 points
    Hi Hasan,

    You can get an input model for the ADC in the datasheet in "Figure 6-32. ADC Analog Input Impedance Model". Ideally you want the external source to be able to charge Ch from 0 to within 1/4LSBs of VREFHI during the S+H time. If settling isn't good (because you have a large C and/or R on the ADC pin) you can try to give more time for settling by increasing the ACQ_PS settling.
  • 0 in reply to Devin Cottier
    Intellectual 780 points
    Dear Sir,
    For a single input signal things are easy to read ADC buffer including channel window setting. As we know it ranges 0 to 3 volts.
    I am worried about, my 6 different input signal conditioning.

    As I mentioned earlier post , I have external I/O input (pin 134-136) those are make condition input to ADCIN_4 to ADCIN_6.


    Can you suggest any idea?
  • 0 in reply to MD MUBDIUL HASAN
    TI__Guru 60865 points
    Hi Hasan,

    For this device, the AC_QPS setting is global for the ADC module, so you will need to find a setting that works for all inputs.

    On other C2000 devices (F2802x, F2803x, F2805x, F2806x, F2837x, and F2807x) the S+H can be configured individually per conversion.
  • 0 in reply to Devin Cottier
    Intellectual 780 points

    Dear Sir,

    Are you talking about ACQ_PS setting idea in this link? Kindly, let me know ingeneral setting to read the ADCs from analog input.