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Need SCI TX FiFo sample code with and without interrupt

Bipin Patil
Intellectual 850 points

Sir,

I am  sucessful using RX Fifo but notable to use TX Fifo.

Can I Get Sample Code for TX Fifo with and without interrupt using TMS 320F2810 .

I want to transmit 10 byte of data only when the TX fifo of 10 level is reached. but i am unable to do so.

Wht i did is I m Monitoring TXFFST for Fifo level, but as soon as i Write a single character in SCITXBUF it transmits the data immediately, instead of waiting for Fifo to fill till level 10. 

please suggest. t

Regards,

Venkatesh

  • 0
    TI__Guru* 84900 points
    Venkatesh,

    If SCI TX is enabled (TXENA bit in SCICTL1), SCI will start transmitting the data available in FIFO while CPU is writing data to FIFO.

    Thanks and regards,
    Vamsi
  • 0 in reply to Vamsi Gudivada
    Intellectual 850 points
    Vamsi,

    Thank You very Much,

    1) Is there Any way that i can hold the Fifo data till it reaches fifo Level and the transmit it whenever needed?

    2) Can i see TXFFST getting incremented whenever data getting loaded in FiFO?

    Regards,

    Venkatesh
  • 0 in reply to Bipin Patil
    TI__Mastermind 32995 points
    You can disable the TXENA bit and write to the FIFO. After the FIFO reaches the level you wish, you can re-enable the TX mode and and it will begin to send what is in the FIFO.

    Yes you can see TXFSST getting incremented.

    You can also use tx interrupts and use the TXFFIL bit field to generate an interrupt when the TX FIFO reaches a certain level.

    sal
  • 0 in reply to Sal Pezzino
    Intellectual 850 points

    Sal Sir,

    When i disable the TXENA bit and load the FIFO till the FIFO level (I Cant See TXFSST Getting Incremented and every one byte load). and then re enable TXENA Bit ... it doesnt transmit the Data.

    Even I am unable to See TXFSST Getting Incremented. I Doubt whether FIFO is really Working or not.

    Following are the setting ....


    ScibRegs.SCICCR.all = 0x0007; // Char = 8, Parity = None, Stop bit = 1, No Loop Back, Asynchronous Mode, Idle-Line Protocol

    ScibRegs.SCICTL1.bit.TXENA = 0; // Disable SCI Transmiter Clock

    ScibRegs.SCICTL2.bit.RXBKINTENA = 0; // Enable RX/BBREAK Interrupt.

    ScibRegs.SCIHBAUD = 0x0000;
    ScibRegs.SCILBAUD = 0x0027; //115200

    ScibRegs.SCIFFCT.bit.CDC = 0; // Disables auto-baud alignment
    ScibRegs.SCIFFCT.bit.FFTXDLY = 0; // FIFO transfer delay

    ScibRegs.SCIFFTX.bit.SCIFFENA = 1; // FIFO Enable
    ScibRegs.SCIFFTX.bit.TXFFILIL = 0x10; //Transmit FIFO interrupt level bits.

    ScibRegs.SCIFFTX.bit.TXFIFOXRESET = 0; // TX reset pointer on zero position
    asm(" NOP ");
    asm(" NOP ");
    asm(" NOP ");
    ScibRegs.SCIFFTX.bit.TXFIFOXRESET = 1; // TX reset pointer on zero position
    ScibRegs.SCIFFTX.bit.TXINTCLR =1; //clear TXFFINT flag

    ScibRegs.SCIFFTX.bit.SCIRST = 0; //reset the SCI transmit and receive channels
    asm(" NOP ");
    asm(" NOP ");
    asm(" NOP ");
    ScibRegs.SCIFFTX.bit.SCIRST = 1; //SCI FIFO can resume transmit or receive.

    ScibRegs.SCICTL1.bit.SWRESET = 1; // Most Important



    At Input1 trigger ScibRegs.SCICTL1.bit.TXENA = 0; // Disable SCI Transmiter Clock

    At Input 2 trigger ScibRegs.SCICTL1.bit.TXENA = 1; //Enable SCI Transmiter Clock

    //Load TX Buff One at a time
    At every Input 3 Trigger                 ScibRegs.SCITXBUF = TxSerialBuff[Counter]; // trigger the input continuously till Fifo get loaded to 16 leve|   

    And monitoring value = ScibRegs.SCIFFTX.bit.TXFFST

    Regards
    Venkatesh.

  • 0 in reply to Bipin Patil
    TI__Mastermind 32995 points
    Were you able to transmit data before?

    I am unsure what the last 4 lines of your code is actually doing. If TXENA is set, then the SCI should be sending data when you start writing to TXBUF.

    Doing it this way, there is no need to clear TXINTCLR because you are not using interrupts. If this is not working for you, I suggest using TXINT and TXFFIL and generating interrupts for transmission. You can disable TXENA and when the FIFO reaches your specified level, it will generate an interrupt and inside that interrupt you can re-enable TXENA and it will send the data.

    sal
  • 0 in reply to Sal Pezzino
    Intellectual 850 points
    Sal Sir,

    Actually i Dont want to use FIFO Interrupt.

    I am able to transmit data as soon as data is written to TXBUF, But i Am Unsure whether FIFO is working since TXFFST is not incrementing.

    I will explain u last 4 line of the code.

    There are 3 Digital Inputs (All +ve edge triggerred)
    2 digital inputs are controlling TXENA, One input making it Enable and the other input making it disable.
    1 digital input loading the ScibRegs.SCITXBUF, one byte at a time.

    and finally monitoring TXFFST bit for Fifo Status.

    ..What i am Doing is
    1. Disabling TXENA
    2. Loading TXBUF one byte at a time and monitoring FIFO status TXFFST (Which is not incrementing)
    3. Step 2 is done 16 times (monitored by a counter).
    4. And then enabling TXENA.

    after doing above steps it doesnt transmit.

    ..
    Am i Doing something wrong or my settings are not Right?.
    ...
    Regards,
    Venkatesh
  • 0 in reply to Bipin Patil
    TI__Mastermind 32995 points

    The FIFO should be incrementing when writing to TXBUF.  With TXENA disabled, the FIFO should be incremenitng.

    Double check to make sure the FIFO is enabled.  ALso, I do not see a need fro SWRESET or FIFO reset in your scenario.  I would avoid that.

    sal

  • 0 in reply to Sal Pezzino
    Intellectual 850 points

    Sir,

    How to confirm whether SCI TXFIFO is working or not?

    Sir CAn you give me setting for TX FiFo to check Or any other documents so I could refer too (Now Refering to SPRU051D)..........

    Venky.

  • 0 in reply to Bipin Patil
    Intellectual 850 points
    Sir,

    Can I Get Sample Code For SCi TX FIFO Operation .

    Venky.
  • 0 in reply to Bipin Patil
    TI__Mastermind 32995 points
    Hi Venky,

    I apologize for delayed response.

    If you disable the TXENA, then the FIFO will not be populated by writing to the TXBUF. I was incorrect above.

    With Tx disabled TXFFST will not increment as you write to TXBUF. I do no think there is a way to prevent the transmitter from sending out the data once it has been written to the FIFO. Additionally, the Tx interrupt will not be triggered while Tx is disabled.

    You will need to store the data in an array and write it to the TXBUF at one time in order to send it all out at once.

    sal
  • 0 in reply to Sal Pezzino
    Intellectual 850 points
    Thank You Sir.

    Regards,
    Venky