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Hi,
I am finding a strange intial nack sending behaviour on my MSP430F5438a.
The master sequence is START -> Slave address+write -> (Slave sends ack) -> Register Addr -> (slave sends ack)-> START->Slave Addr+Read -> (Slave sends ack)-> (Slave sends data)-> NACK -> Stop
When I initially send the I2C engine does not send a NACK. After that it sends the NACK correctly. I have repeated the reading in a loop and it never gives a problem except intially.
Code snippet
inline uint8_t accl_single_read_cmd(uint8_t regaddr) {
char tmpch = 0;
while(UCB1STAT & (UCBBUSY|UCSCLLOW)) {
;
}
send_start(ACCL_I2C_WRITE); //Write
i2c_send(regaddr);
send_start(ACCL_I2C_READ); //Read
set_nack(); //Send NACK.
tmpch = i2c_recv();
send_stop(); //Send STOP.
return tmpch;
}
Initial waveform.
Subsequent waveform (Correct behaviour)
What seems to be wrong?
I also tried by moving the set_nack before send_start(ACCL_I2C_READ); but still the behaviour is the same.
Have you seen this thread MSP430F5438 as I2C Master Receiver can't send NACK to I2C Slave?
It suggests that when a MSP430 is a I2C Master reading data from a slave, the MSP430 doesn't need to set the NACK to end the transfer, but instead just needs to send a stop.
(I never did get round to testing this myself)
Chester Gillon said:Have you seen this thread MSP430F5438 as I2C Master Receiver can't send NACK to I2C Slave?
It suggests that when a MSP430 is a I2C Master reading data from a slave, the MSP430 doesn't need to set the NACK to end the transfer, but instead just needs to send a stop.
(I never did get round to testing this myself)
The probem is that I have to send_start_read(); and then wait for the UCTXSTT to be cleared and then send a stop. I do not want to do this inside an ISR.
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