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Regarding BQ25570 EVM energy harvesting chip testing.

kartheek RP
Prodigy 180 points
Other Parts Discussed in Thread: BQ25570

Hi,

In testing the BQ25570 EVM these are the problems & doubts that remain,can any one help me in these:

  1. Vbias value (TP7 on board) is always oscillating  around 10-20mv and it is not maintained at 1.2v according to datasheet. So due to this Vbat_uv is set to 0v approximately and when input Solar power is switched OFF, Vbat getting discharged to almost 0v (with in few minutes).But Vbat_ok toggling at 3v.Is this the problem of board?
  2. When input power is turned OFF:              C_store, vbat also decreasing.(But according to the working of BQ25570 EVM as Cstore voltage decreases below v_uv ,connection between Vbat and C_store should be turned OFF so that vbat is maintained.)
  3. How vbias=1.2v internally generated on board?
  4. No much difference of toggling of bat_ok,prog_ok is observed as vbat_ok toggling at 3v both in charging case, discharging case.(But according to datasheet vbat_ok should toggle at vbatok_hyst=2.79v,vbatok_prog=2.99v,which is not happening)
  5. How MPPT 50%,80%(given connecting ) achieved using given resistor dividers on board (as only 75% can be possible with given resistor values of 5M,10M,5M ohms)?
  6. How can 80% be achieved by tying VOC_SAMP to VSTOR?
  7. Measured Vmpp,VRdiv,V_uv,V_ov are showing in tens of mv(different from required values), why?

Thank you.

  • 0
    TI__Guru*** 148665 points
    Keep in mind, if VSTOR < 1.8V the IC is in the cold start mode and none of the other IC features (e.g. VBAT_OK, VBAT_UV) are active.
    Regarding 1, TP7 measures VRDIV. VRDIV does not equal VBIAS. It only has 3 voltage pulses every 64 ms, VSTOR, 2/3 of VSTOR and VOUT.
    Regarding 2, with no input power, the IC itself continuous to draw its quiescent current of slightly less than 500nA, which will eventually discharge the storage element on VBAT below the VBAT_UV threshold and then deplete the small capacitor on VSTOR.
    REgarding 3, VBIAS is only generated internally in the IC. There is no pin that outputs VBIAS.
    Regarding 4, since VRDIV only samples every 64 ms, it possible that the rate of charge/discharge may be so fast that it appears that the trip points are not as configured by the resistors.
    Regarding 5, jumper JP4 allows you to tie the VOC_SAMP to VSTOR, setting MPPT to 80%, or to GND, setting MPPT to 50%. If you want a different setting, remove JP4 and install JP1, which connects the resistor divider to VOC_SAMP.
    Regarding 6, VOC_SAMP is internally configured to set MPPT to 80% if it is tied to VSTOR.
    Regarding 7, as mentioned previously, VRDIV, VBAT_UV and VBAT_OV are sampled every 64ms. The datasheet has at least one oscilloscope plot showing this operation. VMPP is not easily measured on VREF_SAMP pin unless you have a volt meter or oscope probe with >> 10Meg impedance. Anything lower quickly discharges the small capacitor on VREF_SAMP.