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BQ76930 - DEVICE_XREADY bit will not clear

Other Parts Discussed in Thread: BQ76930, BQ78350, BQSTUDIO, BQ76940, EV2400

I have designed and fabricated a BQ76930 AFE and BQ78350 GG pair:

  • Boards are configured to manage 6 Li-Ion cells
  • Proper shorting techniques were followed in BQ76930 datasheet to reduce cell count
  • During assembly, cells were connected in a bottom-up order starting with Pack-
  • External balancing FET circuitry

The AFE boots correctly and the BQ78350 can talk to it via I2C. BQ78350 functionality was verified over SMBus with BQStudio and an EV2400 board. BQ78350 is now being held in reset in order to not affect I2C bus. Currently am talking to AFE on I2C with the EV2400 board and the BQ76940 Evaluation Software:0.1.0.7.

The AFE is responsive. I can set and clear the ADC_EN and TEMP_S bits. The DEVICE_XREADY will not clear. Tried the 'Clear Faults' macro, tried writing 0xFF to address 0x00. All voltages and temperatures stay as zero. I2C integrity is fine and transactions are being verified on a scope. Have tried both the BQ7693000 and the BQ7693001. Both result in a frozen DEVICE_XREADY bit. This is the only bit set in the System Status register.

  • RGSRC =      9.08V
  • CAP1 =          3.29V
  • CAP2 =        10.66V
  • REGOUT =    2.52V
  • BAT =           21.55V
  • VC10 =        21.55V
  • VC[9,8,7] =  17.96V
  • VC6 =           14.36V
  • VC5B =        10.66V
  • VC5=            10.76V
  • VC5x=          10.66V
  • VC[4,3,2] =    7.18V
  • VC1 =             3.59V
  • VC0 =             0.00V

I looked at the AFE FAQ for an answer, but as far as I can tell, I am not violating any design rules. I can't see any reason that these should boot into this mode. Does anyone have any suggestions for troubleshooting?

    • CAP2 =        10.66V
    • VC5x=          10.66V

    The upper cell group power is off, so it will have a permanent XREADY.  CAP2 should have 3.3V with respect to VC5X.  Check for a short across the capacitor.  Check for a voltage trapped on TS2 with respect to VC5X --- TS2 should have a pull down to VC5X, normally the thermistor.  If it is pulled down to VSS it may prevent the top group from starting.

    The part could be damaged, but nothing from the voltages you show suggests that.

    Your REGSRC is rather low for driving FETs, if you used the dropping FET you might consider replacing it with a resistor, usually for 6 cells the battery voltage is in range of the REGSRC pin.

  • Thank you! This is very useful information, please note the datasheet SLUSBK2E is misleading as it has a footnote on page 7, 8, 9.

    On the foot note (1) it says if thermistor not used, pull down to VSS with a 10kR resistor, and this is not true for TS2 and I believe it is the same case for TS3 in the BQ76940.

    The 10kR resistor should be pulled down to the appropriate negative terminal of the thermistor, in the case of TS2, it should be pulled down to VC5X, otherwise the chip will fail as you point out, this was driving me nuts hehe..

    I tried to report the datasheet error in documentation feedback, but I get an error..., please report it..
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  • Yes, Thank You!

    Pulling TS2 to VC5x fixed the issue.

    Note (1) on p7 & p9 of SLUSBK2E - BQ769x0 Datasheet implies that both TS1 and TS2 should be pulled to VSS with a 10k resistor if not used.
    Sec 2.2 of SLUUB41 Note that TS1, TS2, and TS3 should all have a '1- to 100-kOhm' pulldown if unused, without specifiying where to pull each input.

    It might also be helpful to explain the purpose of the VC5x and VC10x pins in the datasheet to the designer as well.