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UCC28C44: trigger pulses from out pin of UCC28C44

naga mani deepika basa
Prodigy 140 points
Part Number: UCC28C44
Other Parts Discussed in Thread: TL431

HI

I don't understand how the pulses from the out pin of UCC28C44 be generated, which will drive the Power MOSFET in a flyback topology. Please provide me with some inputs for the FB pin in UCC28C44. Please specify the proper biasing to get pulses. I need this for completion of my project and has a deadline to complete it. Please help me.

  • 0
    TI__Genius 9130 points
    Naga,

    I would recommend following the typical Flyback schematic in the datasheet Fig. 29 or Fig. 31.

    Since both examples are isolated outputs, the error-amp and ref are implemented on the isolated secondary side using a TL431, with the demand signal for regulation coupled to the primary using an opto-coupler.

    Fig. 29 bypasses the internal error amp inside the UCC28C44 by connecting FB to GND, and the opto pulls current out of the COMP pin as needed, to control the COMP pin voltage level, which in turn regulates the primary peak current.

    Fig. 30 is a little different, the opto polarity is the inverse, and delivers current into a resistor to GND to develop a voltage on the FB pin, which in turn drives the COMP pin level to regulate the peak current.

    Fig. 29 implementation is more straight-forward since there is only a single loop compensation network on the TL431.


    If this answers your question, please click the "verify answer" button.

    Thanks,
    Bernard
  • 0 in reply to Bernard Keogh
    Prodigy 140 points

    Hello Mr.Bernard,

    I am working for the similar topology as in fig.29 of datasheet(As you mentioned, in the post regarding fig.29).  While verifying the working of the chip to my application, i did not understand how does the duty ratio changes at the Vout pin of UCC28C44.

  • 0 in reply to naga mani deepika basa
    TI__Genius 9130 points
    Naga,

    The UCC28C44 is a peak-current-mode PWM controller. The primary current is sensed by a shunt in series with the source of the FET, this info is then fed to the CS pin. The controller terminates the cycle when the peak current at the CS pin reaches the level programmed by the COMP pin. In this way, the output is regulated by controlling the duty cycle, which actually regulates the peak current to control the power flow to the output.

    Note that the COMP voltage is scaled (gain of 1/3) and level-shifted (offset of 1.1 V) internally before being compared to the CS pin voltage at the PWM comparator. The CS pin range is 0-1 V, so this is equivalent to 1.1-4.1 V range on the COMP pin.

    Thanks,
    Bernard
  • 0 in reply to Bernard Keogh
    Prodigy 140 points
    Mr.Bernard,
    Thank you so much. Your support helped me a lot.
  • 0 in reply to Bernard Keogh
    Prodigy 140 points

    Hello Mr.Bernard,

    Usually there won't be primary current during starting. In that sense, there wont be any input to the CS pin. So,how does the controller provide trigger pulses  initially? I'm having trouble during starting of the controller. Your help would greatly support me.

    Regards,

    Deepika

  • 0 in reply to naga mani deepika basa
    TI__Expert 4015 points
    1. Check that the controller has sufficient voltage on the Vdd pin to startup.
    2. Check that there is a ramp waveform on the Rt/Ct pin
    3. Check that the OUT pin is high during the upslope of the Rt/Ct pin.
      This turns on the MosFET and allows primary current to flow.
      This creates a ramp voltage on the CS pin.
    4. Check that there is a ramp voltage on the CS pin. 

    Thanks

    Billy 

  • 0 in reply to Billy Long
    Prodigy 140 points
    Hello Mr.Billy,

    1.the controller has sufficient voltage on the VDD pin and is of 18V
    2.There is a ramp waveform on the RT/CT pin but the min value of the ramp is 0.5V and the maximum value of the ramp is 2.4V
    3.The out pin is showing a dc waveform with some small ripple having an average value of 70.599uV
    4.The voltage at the CS pin is zero.
    Please suggest me where am i going wrong.

    Regards
    Deepika
  • 0 in reply to naga mani deepika basa
    TI__Genius 9130 points
    Naga

    As I already said above, the peak current signal on the CS pin is set by the level on the COMP pin.

    If COMP < 1.1 V, there will be no OUT pulses. How are the COMP & FB pins connected?

    If you want to run open-loop, connect FB to GND, leave COMP open, and you should get OUT pulses, the duty cycle will depend on the signal at CS pin.

    Bernard
  • 0 in reply to Bernard Keogh
    Prodigy 140 points
    Mr.Bernard,

    The COMP pin voltage is at 2.025V. I am running in a closed loop. I have connected COMP and FB pins with a capacitor of 22nF. As COMP>1.1V, I should get some pulses, but i dont get any pulses at the OUT pin. So, is there any mistake of biasing?

    Regards,
    Deepika
  • 0 in reply to naga mani deepika basa
    TI__Genius 9130 points
    Deepika

    With ~2 V on COMP, you should get OUT pulses - unless the CS pin is also high > ~1 V?

    Can you post your schematic and waveforms?

    Thanks,
    Bernard
  • 0 in reply to Bernard Keogh
    Prodigy 140 points

    Mr. Bernard,

    I here put the wave-forms at CS and RT/CT pins with UCC28C44.

    Please verify this and give me the best suggestion.

    Regards,

    Deepika

  • 0 in reply to Bernard Keogh
    Prodigy 140 points

    please help me

    If i use the UCC28C44 in open loop mode then the COMP pin voltage is going 6.3V. How can i reduce this voltage? There are no out put pulses as my CS pin voltage ranges between (0-1)V sawtooth waveform. In closed loop I have posted the wave-forms in my earlier post. Even though the COMP pin voltage and the CS pin voltages are within the range, i don't get output pulses. Please provide me with some inputs. Your prompt response would help me a lot. I would be thankful ever.

    regards

    Deepika

  • 0 in reply to naga mani deepika basa
    TI__Genius 9130 points
    Deepika,

    These schematics and waveforms look like they are taken from a simulation. Are all your questions and observations based on behaviour of the simulation, or based on testing of actual hardware?

    Bernard
  • 0 in reply to Bernard Keogh
    Prodigy 140 points
    Mr.Bernard,

    My questions and observations are based on the simulation. I'm first simulating the circuit. Once i get the intended results, I'm going to build the hardware. Based on the above wave-forms(obtained from simulation) may i know where i had made a mistake? Your prompt reply would help me a lot.

    regards,
    Deepika
  • 0 in reply to naga mani deepika basa
    TI__Genius 9130 points
    Deepika,

    Which model are using?

    Are you simulating in TINA or PSpice?

    The waveforms at the CS & RTCT pins look ok/correct. What doe the COMP pin look like?

    I see that you are effectively tying FB to GND, which will try to drive COMP high. The feedback opto would then pull down on COMP to set the required level for regulation.

    I would recommend simplifying the circuit, connect the opto collector to COMP, and the opto emitter to GND, and remove the pull-up to VREF and the compensation components between FB and GND.

    For isolated applications, it's most typical to put the loop compensation on the secondary around the TL431, connect FB to GND to bypass the error amp inside the primary controller, and then couple the opto collector directly to COMP.

    If you want to simplify it even further, you can run open loop with a resistor from COMP to GND (with FB tied to GND), then vary the COMP level by adjusting the pull-down resistor.

    If there are still no OUT pulses with that simplified setup, we will need to ask the modelling team for help.

    Thanks,
    Bernard
  • 0 in reply to Bernard Keogh
    Prodigy 140 points

    Mr.Bernard,

    I'm using the spice modelm of UCC28C44. I here put the comp pin voltage waveform.

    the comp pin voltage is 2.021V. I will try with your suggestions. Thank you so much.

    regards

    Deepika

  • 0 in reply to Bernard Keogh
    Prodigy 140 points

    Mr.Bernard,

    I'm using SABER tool for simulation. I have done a validation check, to get the pulses as shown in the figure below.

    I have put all the waveforms at the respected pins. I still don't get pulses,but the pulses are like spikes. Even if i increase the COMP pin voltage in the range of (1.1 to 4.1V) i don't get pulses. I even have varied the CS pin voltage in the range of 0-1V. But i found no pulses at the output pin. Kindly give me the best help so that i could do the simulation first and could do the hardware next. I'm awaiting your reply.  My advisor is so tough towards me. I should finish it at an earliest. I'll be ever thankful.

    Regards

    Deepika

  • 0 in reply to naga mani deepika basa
    TI__Genius 9130 points
    Deepika,

    I have asked someone in the PSpice modelling team to take a look at this.

    Thanks,
    Bernard