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UCC28950: Defference of delay time

Kuramochi Tadahiko
Guru 28715 points
Part Number: UCC28950

Hi,

There is deference during OUTC/D delay as follows.

Is it correct behavior?

Is there any way to decrease this deference?

Best Regards,

Kuramochi

  • 0
    TI__Mastermind 25570 points

    Hello Kuramochi-san

    Asymmetric propagation delays in the OUTC and OUTD paths external to the UCC28950 can cause differences like this so could you confirm that the waveforms are taken at the OUTx pins of the UCC28950 device and not elsewhere in the path to the MOSFET gates.

    If the customer is using the adaptive delays feature, then this behaviour could occur if the CS signal were different from cycle to cycle or if the ADEL pin was picking up switching noise.

    If there was a sub-harmonic oscillation - due to insufficient slope compensation then this could cause the adaptive delays to vary from cycle to cycle. The best way to check this would be to monitor the CS signal for instabilities.

    Does this behaviour occur at other duty cycles - ie if the Vin/Vout ratio is increased or reduced

    Is the UCC28950 being synchronised to an external synchronisation source ?

    Please let me know how you get on.

    Regards
    Colin


    BTW: I'm travelling on business all next week so my reply may be delayed.