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UCC28051: Standby Power Reduction

Stefan Klammer
Prodigy 40 points
Part Number: UCC28051

Hello,

im using the UCC28051D as Inputstage to an LLC in the Powerclass of 150W. Actually I'm trying to reduce my Standby Losses. I have done a Disable Circiut, which gets a signal from the galvanic isolated secondary side to drive the VO_SNS Input into Overvoltage when disabled and releases it to normal value when enabled. So my problem no is, if I'm in disable mode the Losses of my Voltage Divider on VO_SNS and MULT_IN are about 160mW. So now i want to reduce this losses.

My Standby Power for the whole application should not exceed 0.5W.

Now my question is how low could i choose the current through this resistors? In the datasheet there are 100uA for MULT_IN Divider and 200uA for VO_SNS Divider written but in the typical application on Page 16 the current through VO_SNS is about 54uA. Is this ok or is it to low? Which drawbacks do i get with a too low current?

Thank you all for your help,

Best regards

Stefan

  • 0
    TI__Mastermind 25570 points
    Hi Stefan
    There is definitely some room for manoeuvre here.

    The bias current for the VO_SNS amplifier is given as 0.5uA worst case. If you have 200uA in the sensing chain then 0.5uA will give you a 0.25% error in output voltage or about 1V on 400V (± on a nominal 399V). If you reduce the current in the bias chain you will double the increase. To be honest, and not knowing your exact specs a 1V error on the output of the pfc stage isn't significant - especially considering that there will already be considerable ripple voltage on Vout at twice line frequency, typically ±15V. So, in summary - 54uA or even less won't cause a catastrophy but as the current in the divider chain reduces, the bias current into the amplifier becomes more significant and will cause an increasing error in Vo - you simply have to choose how much error you can tolerate. I'd suggest you look at 25uA for a power dissipation of 10mW and a potential worst case error of 8V (±4V). One thing to be careful of is that contamination on the PCB surface can cause leakage currents in parallel with the resistor so check the use environment and the possibility of solder flux residues picking up moisture from the atmosphere. This would be normal practice in high impedance circuits in any case.

    The bias current for the MULTIN is given as 1uA worst case but 0.1uA typical. Note, the max spec is normally a +6 sigma value so you are unlikely to encounter it unless you are building a very large quantity of products. The 100uA is again based on the requirement that errors due to the bias current are negligible. The same argument applies here but the error will be that the instantaneous voltage is not sensed accurately and the multiplier output will include some distortion. The nett effect will be that the power factor will get worse as the error due to the bias current gets larger. So there will be a tradeoff here between Power Factor and no-load power dissipation.

    Overall, you may be able to get enough improvement by dropping the VO_SNS current to 25uA to allow you to leave the MULTIN divider chain alone.

    Regards
    Colin
  • 0 in reply to Colin Gillmor
    Prodigy 40 points
    Hello Colin,

    thank you for your fast and really helpful reply. As you have written there is a Output Ripple so i think i could go down to the 25uA for the output Voltage Divider. I will try it in the prototype to see if the additional error is acceptable.

    Thank you,
    Best regards,
    Stefan