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UCC256303: Question about soft start and VCR setting

Guru 19575 points
Part Number: UCC256303

Please let me know about four points UCC256303 function, because customer is struggle with design for good LLC performance. 

①Soft start time is depend on Css and VCR capacitor by below E2E.

 Is there soft start equation included VCR capacitor? 

 Or, is there no need to include because very small influence?

②I think that soft start time is depend on load current.

 Is there relation data (or graph) for soft start and load current? (The other than EVM user's manual) 

③Customer used design calculator (sluc634) and set the burst mode threshold from RLL value, but test result were no change the burst mode. (continue to normal operation) 

 Please let me know about possibility of reason and any idea for way to choice RLL.

④About VCR (VcrLower), Customer can't set superb switching frequency.

 ・Low VCR_Lower setting will increase startup frequency and decrease startup resonant current, but high switching frequency cause to no reach setting Vout.

 ・Increase VCR_Lower will reach setting Vout on normal operation, but increase startup resonant current.

 If there technique or correct process for superb adjustment, please let me know.

 And, is there any other adjustment point? 

 

Best regards,

Satoshi

  • Hi Satoshi,

    Thanks for your interest in UCC256303.

    1. I don't have an algabraic expression for the soft start time that includes the Vcr capacitance unfortunately. For adjusting the soft start time, I would suggest keeping the same Vcr divider ratio (you would need to change both the top and bottom Vcr capacitors).

    2. I would expect some difference in the soft start time if starting into full vs starting into no load. This difference is primarily dependent on the power stage parameters, how much gain you have, your bandwidth, etc.

    3. Could you tell me what values your customer used in the RLL divider? Also could you tell me what was the voltage on the BLK pin? At what load is the customer wanting to enter burst mode?

    4. I would recommend keeping the same Vcr divider ratio when tuning the soft start time (you will need to adjust both VCR_lower and VCR_upper). Tuning soft start is typically accomplished by adjusting the VCR capacitors (keeping the same Vcr divider ratio) and adjusting the soft start capacitance. With lower VCR capacitance, is the converter never reaching the output voltage regulation set point? I would expect once the soft start voltage reaches its maximum, the controller will push the switching frequency lower to increase the power stage gain and achieve regulation. The longest possible soft start time is given by equation 72 in the datasheet:www.ti.com/.../ucc256303.pdf

    Best Regards,
    Ben Lough
  • Ben-san

    Thank you for kind reply,

    I answer your question ③, please see below and advice.

    ・RLLUpper: 47kΩ and RLLLower: 18kΩ

    ・BLK pin voltage: 3.35V

    The other condition is attached below,

    UCC28630-3.xlsx

    Best regards,

    Satoshi

  • Hi Satoshi-san,

    I would recommend adjusting RLL_lower to be ~400-500kΩ. For adjusting the burst mode threshold, I recommend following the procedure in section 3 of this app note:www.ti.com/.../slua836.pdf.

    Best Regards,
    Ben Lough
  • Ben-san

    Thank you for reply,
    I update customer information and additional question, please see below.
    ・Customer request, Burst mode threshold is 0.3A (24Vout).
    ・Additional question;
     Is there way to unable to VBLK OVP function?
     VBLK is react high surge voltage(460V) and operate OVP for the moment.

    Best regards,
    Satoshi
  • Hi Satoshi-san,

    Thank you for the additional information. You can prevent tripping the input OVP function by using an external circuit to clamp the voltage on the BLK pin.

    Best Regards,

    Ben Lough