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UCC28060: Strange switching behaviour for chanel B

P de Winter
Prodigy 40 points
Part Number: UCC28060
Other Parts Discussed in Thread: UCC28056

Hi All,

We setup the controller as calculated in the SLUC072B it will be a 600W converter.

As the unit goes above 300W the second stage is switched on. But the second switch is not switching constant at once but is going on and off with gaps. The problem is than that the input power is jumping with a difference of 50W until chanel A and B are switching constantly.

It looks like there is no hysteresis on the PHB but according to the datasheet there is.

Has anybody seen this problem and-or has a solution for this?

Thanks for the help,

Patrick

  • 0
    TI__Expert 3095 points
    Hi Patrick,
    It is difficult to understand your circuit should behave this way.
    When Phase B is switched OFF the TON time for Phase A is doubled so that the input power should remain constant.
    Also the PHB pin has 0.2V of hysteresis to avoid repeated transitions between single & dual phase operation.
    Could you please send a scope picture showing the two inductor currents and the COMP pin voltage.
    This may help us to understand what is going wrong.
    Thanks
    Joe Leisten
  • 0 in reply to Joe Leisten
    Prodigy 40 points

    Hi Joe,

    Here is a scope image.

    Ch1 is the gate of A
    Ch2 is the gate of B
    Ch3 is the comp

    the comp is not steady as shown in the image. If we place a DC voltage at the input the switching behaviour of B works perfect. Back to AC we have the above problem for a range of 40W hysterisis.

    I hope it gives a idea of what is going on and cuases this behaviour.

    Thanks for the help,

    Patrick

  • 0 in reply to P de Winter
    TI__Expert 3095 points
    Hi Patrick,
    Thanks for capturing that waveform. It looks to me like the 2 x Line frequency ripple amplitude on the COMP pin is sufficient to overcome the 0.2V hysteresis on this pin.
    For a PFC circuit it is normal to have 2 x Line frequency ripple on the output of the PFC stage. The amplitude of this ripple depends only upon the ratio of output power/output capacitance. Normally the COMP network is designed to attenuate this ripple frequency component because any residual ripple on the COMP pin will result in third harmonic distortion of the Line current. Please look at the UCC28056 datasheet for information on designing the COMP network to limit third harmonic distortion.
    It would be good to see the COMP waveform just above and below the power level at which you see this issue to verify my theory.
    You should be able to resolve this issue if we reduce the level of 2 x Line frequency ripple on the COMP pin. This can be done either by increasing the output capacitance attached to the PFC stage, or by adjusting the design of the COMP network to attenuate 2 x Line frequency more.
    Thanks
    Joe Leisten
  • 0 in reply to Joe Leisten
    Prodigy 40 points

    Hi Joe

    As you can see in the pictures once B is steady the comp is also steady.

  • 0 in reply to P de Winter
    TI__Expert 3095 points
    Sorry Patrick,
    I should also have realized that the frequency on COMP is not even close to 2 x Line Frequency...
    Could it be that we have some miss-match between the two PFC channels?
    When channel B is switched OFF, the TON time should be doubled so that the input power is not changed by the loss of a phase. It looks to me as if when channel B is turned OFF the delivered power is dropping, causing the COMP pin voltage to rise by 0.2V. Please could you compare the inductor current waveform of the two channels to see why doubling the TON period of channel A is not resulting in the same input power as both channels with half of the TON period. The peak inductor current for channel A only should be twice that of each channel when they are working together.
    It may also be worth swapping the inductors between the two channels to see if the result is the same.
    Thanks
    Joe