I'm using an 8-bit SPI to talk to the TLC5971. The SCKI runs at 4MHz (250ns period) when the SPI is sending 8-bit chunks of data. The timing between the last SCKI and the first SCKI of the next 8-bits of data is ~5.24us. This is working, but based on the specification I would not have expected this to work. In the specification the minimum latch timing from the last SCKI is 1.34us or it is 8 times the SCKI period so in my case it would have been 8*250ns = 2us. Am I reading the specification incorrectly? What is the latch timing?
Here is how I’m setting the FC register:
bit 213: BLANK = 0
bit 214: DSPRPT = 1
bit 215: TMGRST = 0
bit 216: EXTGCK = 0
bit 217: OUTTMG = 1
Thanks,
Garrett