Hi
Could you please tell me the answer for the followings?
I'm referring SLVA744.
1.
Regarding to multiplexed ES-PWM (8+8 Mode) in Figure 15, sub-period can be offered by 257 x 32 GCLK.
In this case, can 1 Total Display Period be expressed by 257 x 32 x 256 = 2105344 GCLK period?
2.
When SEL_GCLK_EDGE(bit 6 of FC2 reg)=1, OUTn turns on/off at both edges of GCLK.
In this case, what is number of GCLK?
For example, 257 GCLK is odd. How many GCLK should we count per segment?
BestRegards