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TPS737: Several questions

Hirotaka Matsumoto
Guru 27525 points
Part Number: TPS737

Hi all

Would you mind if we ask TPS737?

<Question1>
Do you have VFB(Internal reference) data with Tj=-40 to 125C?
The data sheet shows in case of Tj=25C.
So, there is the description "Over operating temperature range (TJ = –40°C to 125°C)", so do Min and Max value mean in case of Tj=-40 to 125C?

<Question2>
Is there internal(weak) pull-down resistance at EN pin?
If there is internal pull-down resistance at EN pin, how much is the tolerance?Approx ±20%?

<Question3>
When Vin < Vout occurs, will the device be damaged?
We guess that there are follows cases;
-Case1 : Vout asserted transient voltage(or surge) ->  as the result, Vin < Vout
-Case2 : Discharge time difference between Vin and Vout ->  as the result, Vin < Vout
-Case3 : Vin is abnormal(short) ->  as the result, Vin < Vout
At all cases, we concider that the device will be damaged, right?

<Question4>
In relation to <Question3>, according to insert diode between Vin and Vout, is it possible to prevent from damage? 
If we insert the diode Vin and Vout, should we be concerned about ocillation(stablity)?

<Question5>
If you have the data of phase margin and gain margin using EVM(TPS73701DRVEVM-529), could you give us as reference(including Vin, Vout/Iout condtion)?
Of cource, we recognize that gain margin is enough(at least more than 60 degree).

<Question6>
About CFB, how much is the time constant which is limit of response?
Usually, we should use CFB less than 0.1uF.(On the datasheet, there is the description 10nF.)

We appreciate your help always.

Kind regards,

Hirotaka Matsumoto

  • 0
    TI__Expert 8905 points
    Hi Hirotaka,

    1) This spec is covered by the accuracy spec for over temp, 3% accuracy overall. The reason for this is that more then just the internal reference will drift, so the overall accuracy shows the drift performance of the entire LDO.
    2) There is no weak pull-down, however there will be leakage currents into the enable pin. The leakage currents may be positive or negative (depending if they are flowing from Vin to enable or from enable to ground).
    3) This device has built-in reverse current protection by grounding the body connection of the pass device, and some other methods to protect the internal circuits. As such the case of Vin < Vout should not damage this device.
    4) The diode is one of several solutions and it should not effect stability. However as this part has protection for reverse current the diode is not needed.
    5) On most LDO's it is not possible to accurately measure phase and gain margin externally as the internal compenstation can make it impossible to break the loop (such as an internal feedforward cap). For an example of this I measured GM and PM on a different LDO and got a crossover of about 200 kHz...but design sims, noise, and transient response showed the real crossover to be in the 1-2 MHz region, a decade higher. As such my measurement was not valid.

    The best stability checks for LDOs is to check load transients and ensure there is little to no ringing. Noise can also give an indication as lower phase margin will show up at the crossover frequency by a strong peaking in the noise.

    6) The time constant from the Cff (sometimes called Cfb) is typically tau = R1||R2 * Cff (in some cases shortened to R1 * Cff). Generally keep Cff at or below 100 nF to avoid a few other issues detailed in the following:
    www.ti.com/lit/an/sbva042/sbva042.pdf

    Regards,
    David