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LM10011 the setting value and the behavior of IDAC_current at startup

Yuto Sakai
Mastermind 6100 points

Hi,

Please tell me about the setting value at startup and the behavior of IDAC_current.

· If the VIDS goes from "L" to "H" after EN (Enable) at startup, will the initial value of VID [5: 0] be reflected?
What is the initial value of VID [5: 0]? (The upper 3 BIT is the VIDA - C terminal, and the lower 3 BIT is the initial value?)
What is the current value of IDAC_OUT at each of the following timings?
* When only VDD is input (EN: Disable): Vout at 0 uA?
* For VDD + Enable: Vout set with current value of Rset?

Best Regards,
Yuto Sakai

  • 0
    TI__Mastermind 26610 points
    Hello Yuto,

    I believe figure 1 in the datasheet provides the detail you are asking? initial value will be set by RSET. Then, In 6 bit mode when VIDS goes from L to H, the IDAC out is updated to the corresponding level set on VIDA - C. As can be seen in Figure 1, two transitions of VIDS from L - H is required to get to the 6 bit programming levels.

    Regarding the final part of your question, VDD > VUVLO_R and EN > VEN, for IDAC to be present.

    Hope this helps?

    David.