Hi,
I am trying to capture voice from headset microphone connected to TPS65950 headset lines.
Recorded sample, when played back on PC has a lot of noise along with voice the recorded voice. Also, the waveform(2s complement) has values only on the positive side. And the top of the waveform is flat(clipped). But the surprising thing is that, if I send back the recorded data(without any modifications) to TPS to play on headset speaker, it plays without any noise.
Also, if I don't add a delay between configurations before CODEC is powered on, nothing gets recorded from the mic.
I need to remove this noise is the recorded sample as this will get processed further and any noise in the recorded sample is not desirable.
No one else is configuring the audio module and the below configuration are done after power cycling the unit. So all other registers will be in their default state.
CONFIGURATION VALUES:
#define CODEC_MODE_VALUE 0x02 //(codec on)
#define OPTION_VALUE 0x14 //0x14 (V RX on and V TX L on)
#define MICBIAS_CTL_VALUE 0x04 //0x04 (HS MIC bias on)
#define ANAMICL_VALUE 0x12 //(0x12=HSmic on and L amp on)
#define ANAMICR_VALUE 0x00 //(0x11=submic on and R AMP on)
#define AVADC_CTL_VALUE 0x08 //(0x08=ADC L on, ADC R off)
#define ADCMICSEL_VALUE 0x00 //(0x00 ADCL->TX2L, ADCR->TX2R) (0x05 digital mic to TX(1/2)(L/R) dig mic off)
#define DIGMIXING_VALUE 0x00 //(no mixing)
#define AVTXL2PGA_VALUE 0x0F // 0x1A // max gain 31 db VTX_L2
#define AVTXR2PGA_VALUE 0x00 // 0x1A // max gain 31 db VTX_R2
#define VOICE_IF_VALUE 0xE9 // E3 Sterio//E1 mono //PCM slave. Vin on, Vout on, Mono, VIF On, TX on clk falling edga
#define VRXPGA_VALUE 0x25 // (0x25 =0dB, max 0x31=12dB)
#define AVDAC_CTL_VALUE 0x10 //voice DAC only on
#define HS_SEL_VALUE 0x01 // 0x01 = HS V L on 0x09 = HS V L/R
#define HS_GAIN_SET_VALUE 0x0A // Headset R/L gain (0x0A= 0dB, 0x05=6dB, 0x0F=-6dB)
#define HS_POPN_SET_VALUE 0x62 // (0x62 = VMID on, Mute ctrl on, remp_en on)0x00
#define BOOST_CTL_VALUE 0x00 // 0x01, 0x02, 0x03
#define SOFTVOL_CTL_VALUE 0x01 // 0x61 On // 0x00SOFT Vol off
#define APLL_CTL_VALUE 0x16 // (audio PLL on 26 MHz)
#define MISC_SET_1_VALUE 0x02 // (0x02= smooth gain change on , FM loop disabled)
#define PCMBTMUX_VALUE 0x00
#define VDL_APGA_CTL_VALUE 0x33 //( 0db gain, FM disable, DAC enable, Analog Amp enable)
#define ANAMIC_GAIN_VALUE 0x02 //(mic L amp gain 0x00 = 0dB, 0x02= 12dB, 0x05=30dB)
#define MISC_SET_2_VALUE 0x56 // 0x00 HP Filters used//0x56 HP filters Bypassed
CONFIGURATION SEQUENCE:
I2C_WRITE(ANAMIC_GAIN_REG, ANAMIC_GAIN_VALUE);
Delay_Millisec(1);
I2C_WRITE(MISC_SET_2_REG, MISC_SET_2_VALUE);
Delay_Millisec(1);
I2C_WRITE(VDL_APGA_CTL_REG, VDL_APGA_CTL_VALUE);
Delay_Millisec(1);
I2C_WRITE(PCMBTMUX_REG, PCMBTMUX_VALUE);
Delay_Millisec(1);
I2C_WRITE(MISC_SET_1_REG, MISC_SET_1_VALUE);
Delay_Millisec(1);
I2C_WRITE(APLL_CTL_REG, APLL_CTL_VALUE);
Delay_Millisec(1);
I2C_WRITE(SOFTVOL_CTL_REG, SOFTVOL_CTL_VALUE);
Delay_Millisec(1);
I2C_WRITE(BOOST_CTL_REG, BOOST_CTL_VALUE);
Delay_Millisec(1);
I2C_WRITE(HS_POPN_SET_REG, HS_POPN_SET_VALUE);//Vmid ON, Mute FET
Delay_Millisec(1);
I2C_WRITE(HS_GAIN_SET_REG, HS_GAIN_SET_VALUE);//SPK analog gain R 0dB L 0dB
Delay_Millisec(1);
I2C_WRITE(HS_SEL_REG, HS_SEL_VALUE);
Delay_Millisec(1);
I2C_WRITE(AVDAC_CTL_REG, AVDAC_CTL_VALUE);
Delay_Millisec(1);
I2C_WRITE(VRXPGA_REG, VRXPGA_VALUE);
Delay_Millisec(1);
I2C_WRITE(VOICE_IF_REG, VOICE_IF_VALUE);//Slave, MONO , Falling edge
Delay_Millisec(1);
I2C_WRITE(DIGMIXING_REG, DIGMIXING_VALUE);
Delay_Millisec(1);
I2C_WRITE(ADCMICSEL_REG, ADCMICSEL_VALUE);
Delay_Millisec(1);
I2C_WRITE(AVADC_CTL_REG, AVADC_CTL_VALUE);
Delay_Millisec(1);
I2C_WRITE(OPTION_REG, OPTION_VALUE);//DL PCM RX EN
Delay_Millisec(1);
I2C_WRITE(ANAMICR_REG, ANAMICR_VALUE);
Delay_Millisec(1);
I2C_WRITE(ANAMICL_REG, 0X12);
Delay_Millisec(1);
I2C_WRITE(MICBIAS_CTL_REG, MICBIAS_CTL_VALUE);//MICBAIS 1 MIC BIAS 2 HS MIC Bias
Delay_Millisec(1);
I2C_WRITE(CODEC_MODE_REG, CODEC_MODE_VALUE);
Delay_Millisec(1);
I2C_WRITE(AVTXL2PGA_REG, AVTXL2PGA_VALUE);
Delay_Millisec(1);
I2C_WRITE(AVTXR2PGA_REG, AVTXR2PGA_VALUE);
Delay_Millisec(1);
I2C_WRITE(VSTPGA_REG, 0x00);
Delay_Millisec(1);
val = 0 ;
I2C_READ(ANAMICL_REG, &val);
val &= ~(0x60); //clear selection bits
val |= (0x40); //select voice path for offset cancellation
I2C_WRITE(ANAMICL_REG, val);
val = 0 ;
I2C_READ(ANAMICL_REG, &val);
val |= 0x80; //set offset cancellation start bit
I2C_WRITE(ANAMICL_REG, val);
do
{
AosSleep(AosMsToTicks(50));//datasheet
I2C_READ(ANAMICL_REG, &val);
}while(val & 0x80);