TPS650830: Confusion over VCCIO load switch control.

Thomas Horwitz

Part Number: TPS650830

On page 138 of the data sheet and in the schematic in document number tidrco4.pdf the control for the VCCIO load switch comes from PGD, pin H3. The input for VSD, pin E6, comes from VCCIO which is the output voltage from the load switch. The VCCIO voltage must be good before it can turn on the load switch. How can the output of the load switch control the gate of the load switch and work?

over 6 years ago

0 Jayanth Kruttiventi over 6 years ago

TI__Intellectual 1360 points

Thomas,
As VCCIO is external load switch, and to be part of PMIC sequencing we use PGD pin to enable it. To do that, in comparator D, we use PGD as qualified enable signal of END. Once the VCCIO is enabled, output is fed back to VSD input. The power good is internal signal. This gives control to PMIC to disable the rail even when END pin is high for debug purpose. Also during any faults, VCCIO rail can be disabled soon.

Regards,
Jay

0 Thomas Horwitz over 6 years ago in reply to Jayanth Kruttiventi

Prodigy 225 points

I still do not follow. When power is applied the output of the VCCIO load switch is zero volts. That zero volts is the input to VSD and that controls the output of PGD. The output on PGD will be low and the gate on the VCCIO power switch will also be low. Therefore the output on the VCCIO load switch will remain at zero volts. What am I missing?

0 Jayanth Kruttiventi over 6 years ago in reply to Thomas Horwitz

TI__Intellectual 1360 points

Thomas,

PGD is not output of VSD. PGD is output/qualified enable of END. I hope the picture helps.

Regards,

Jay

0 Thomas Horwitz over 6 years ago in reply to Jayanth Kruttiventi

Prodigy 225 points

This makes more sense. I was going by the figures on pages 53, 54, and 55 of the datasheet. Are these figures not accurate?

0 Jayanth Kruttiventi over 6 years ago in reply to Thomas Horwitz

TI__Intellectual 1360 points

They are general implimentation of the comparators. Depending on which rail we are monitoring if it is internal or external, we reassign power good pins as qualified enable. In few cases, we have both power good as well as qualified enable for a comparator.

Here is the list of how the comparator pins are used.

0 Thomas Horwitz over 6 years ago in reply to Jayanth Kruttiventi

Prodigy 225 points

What do you mean by "qualified" enable?

0 Thomas Horwitz over 6 years ago in reply to Thomas Horwitz

Prodigy 225 points

Does DDR_VTT_CTRL get tied to SLP_S0# or the something else?

0 Jayanth Kruttiventi over 6 years ago in reply to Thomas Horwitz

TI__Intellectual 1360 points

Thomas,

SLP_S0# pin should not be tied to DDR_VTT_CTRL. SLP_S0# pin is used to enable DVS on any rails if enabled. By default none of the rails on TPS650830 have DVS enabled. DDR_VTT_CTRL pin is used to enable VTT rail. Please note that to enable VTT rail, system power good pin should be high.

Regards,

Jay

0 Thomas Horwitz over 6 years ago in reply to Jayanth Kruttiventi

Prodigy 225 points

Does that mean DDR_VTT_CTRL gets tied to the ALL_SYS_PWRGD pin? Also I do not find V1.00S in my Intel documentation. Is it VCCst or VCCstg?

0 Jayanth Kruttiventi over 6 years ago in reply to Thomas Horwitz

TI__Intellectual 1360 points

DDR_VTT_CRTL is enable signal for VTT_LDO and it should come from PCH. In certain configurations, you do not have V1.00S rail and VSG can be connected to VR1 output.

Regards,
Jay

0 Thomas Horwitz over 6 years ago in reply to Jayanth Kruttiventi

Prodigy 225 points

I am using DDR4 which requires V2.5U instead of V1.8U. Do I still hook up V2.5U to VSB or is that comparator fixed at 1.8V?

0 Jayanth Kruttiventi over 6 years ago in reply to Thomas Horwitz

TI__Intellectual 1360 points

VSB pin can only monitor 1.8V. If you use DDR4 memory, you will need to use a resistor divider with minimum power dissipation between 1.8U2.5U output to gnd such that voltage monitored at VSB pin is 1.8V.

You can also connect 1.8A rail directly to VSB pin, but this is not recommended as PMIC cannot monitor the state of the 1.8U2.5U rail.

Jay

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TPS650830: Confusion over VCCIO load switch control.