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TPS65950 in slave mode

Matthew Purvis
Prodigy 30 points
Other Parts Discussed in Thread: TPS65950, DM3730

Due to design requirements, we recently made a change in our design using the DM3730 and TPS65950A3. Originally, the TPS65950 was configured as the BeagleBoard xM and booted in master mode. PWRON was tied to VBAT and we used an 8 bit MCU to control a load switch to gate the Li-Ion battery to turn on the system. 

As I mentioned, we redesigned the system slightly. Now, the Li-Ion battery is always connected to VBAT. Both BOOT0 & BOOT1 are tied to VBAT for slave mode operation, and the PWRON signal is now controlled by the 8-bit MCU (drive high to turn on system).

The previous design worked well. The new design doesn't function properly. VIO comes up at 1.8V, VPLL1 comes up at 1.8V, and VDD2 comes up at 1.2V. However, VDD1 doesn't come up and the 32KHz crystal stops oscillating. 

I've been over and over the datasheet, TRM, design guide, and schematic checklist and have only seen one item that may indicate a problem

In the TRM, SWCU050g, page 110/111 reads:

3.2.3 External 32-kHz Slave Mode Operation
  • In master mode:
      When the device oscillator is connected to an external 32.768-kHz crystal through the
      32KXIN/32KXOUT balls, 32KCLK is available when the device power-on reset (POR) is released.
      When the device oscillator is connected to an external digital 32.768-kHz clock through 32KXIN input,
      the device POR is released only when the external digital clock is available. Software can enable the
      oscillator mode after the first start.
  • In slave mode:
      When the device is configured in slave mode (operates under the control of an external controller), the
      internal 32-kHz oscillator circuitry is bypassed and an external 32-kHz signal is required.

Does this master/slave reference refer to the BOOT mode? 

Would not having an external 32KHz source cause VDD1 to fail?

I have had a difficult time finding additional information or guidelines for designing the system with TPS65950 in slave mode nor have we found a development kit that allows easy reconfiguration of the power system. 

Thank you!

  • 0
    Prodigy 30 points
    Injecting the digital 32KHz clock output from the BeagleBoard xM TPS65950 into the 32KXIN ball of our system's TPS65950 succeeded in bringing up VDD1 finally.

    If the 32KHz clock is used to time the power up sequence, then it is possible that the residual 32KHz signal was sufficient to bring up VIO, VPLL1, and VDD2, but by the time VDD1 should come up, the 32KHz signal had attenuated too much to finish the power up sequence.
  • 0
    Prodigy 30 points
    It appears that section 3.2.3 was the key. Once I injected a 32KHz signal, the TPS65950 has come up fully and the rest of the systems on the board are running.