TPS65910 PFM

Mitsuharu Iwasaki55

Intellectual 750 points

Other Parts Discussed in Thread: TPS65910

Hello

I habe some questions about PFM mode.

Default mode of SWIO of TPS65910 is PFM mode. After power-on, a processor cahnges mode to ForcedPWM mode.

But transition from PFM to ForcedPWM is large ripple.

Q1:

Are there any ideas to improve ripple? Examples are to change external parts or others.

Q2:

When the conditions of load current are difference such as 10mA CC, 40mA CC, 80mA CC and 0-400mA triangle current pulse , Are ripple the same or difference about each load current? CC = constant current.

Best Regards,

Mitsharu Iwasaki

over 9 years ago

0 Richard Solarski over 9 years ago

TI__Genius 10885 points

Q1: You can add more load capacitance, but this will begin to affect your transient response. You could also try clearing the DCDC CLK SYNC bits to see if your issue is related to a known errata - Item #2 in www.ti.com/.../swcz010a.pdf

Q2: The ripple may vary slightly with different load profiles but this has not been fully characterized.

0 Mitsuharu Iwasaki55 over 9 years ago in reply to Richard Solarski

Intellectual 750 points

Rechard,

Thank you for replying.
About swcz010a.pdf errata,
1. "VDDI, VDD2, and VIO output programmed voltage level can go higher than expected or crash" means that TPS65910 is broken?
2. What volt is that shifted?
3. How frequency is that occured? evry time?
3. Is PWM mode OK?

Regards,
Mitsharu Iwasaki

Power management

Power management forum

TPS65910 PFM