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TPS24711 datasheet question:

ken holmes
Prodigy 70 points
Other Parts Discussed in Thread: TPS24710, TPS24711

9.2.2.2.3 Gate Clamp Diode

The TPS24710/11/12/13 has a relatively well-regulated gate voltage of 12 V to 15.5 V with a supply voltage VVCC

higher than 4 V. A small clamp Zener from GATE to source of M1 is recommended if VGS of M1 is rated below 12

V. A series resistance of several hundred ohms or a series silicon diode is recommended to prevent the output

capacitance from discharging through the gate driver to ground.

[ I don’t understand how this discharge current path is possible ]  

  • 0
    TI__Mastermind 31580 points
    Hi Ken,

    As per the other post moving to the correct forum.

    Regards

    Peter
  • 0 in reply to Peter Meaney
    Prodigy 70 points
    Hi Peter, what is the correct forum? Thanks.
  • 0 in reply to ken holmes
    TI__Genius 12420 points
    Hi Ken,

    It is now in the correct forum (Power Interface) and our team is aware of your question. I will contact our engineer who supports the TPS24711 specifically.

    Thanks for your patience.

    -Alex
  • 0
    TI__Expert 5940 points
    Ken,

    1st, the best up front thing to do is to use FETs with both a positive and negative Vgs rating of 16v or more. The data sheet apps paragraph mentions 12v but Vgs can be 15.5v per the EC table. If you went with a lower Vgs rated device, you will need to be concerned about too high Vgs applied, hence the zener of appropriate voltage rating for normal operation. The current path mentioned would be into the gate pin of the IC, through the now forward biased zener. The internal CB fast pull down FET (has the one shot shown at its gate in the block diagram, pg 13) could potentially receive a large amount of energy from a high cap bank in the event of a fast turn off. Likewise, the normal 11mA sinking current would slowly draw from the Cout cap bank. In either case, the series resistor or diode is intended to prevent or limit this. However, both will potentially interfere with the reverse rating of the FET so caution and circuit verification under your system conditions should be done. Again, the best course of action is to use a sufficiently rated Vgs FET in your application and this isn't a concern.

    Brian