Dear Sir,
Our customer would like to have documents about thermal design for CSD18531 describing relation between stencil area and thermal resistance. Are there any documents except for datasheet? Please advise.
Regards,
Koide
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Dear Sir,
Our customer would like to have documents about thermal design for CSD18531 describing relation between stencil area and thermal resistance. Are there any documents except for datasheet? Please advise.
Regards,
Koide
Koide-san,
I do not believe we have any official documents but I have reached out to our packaging team for comment. I will let you know their reply.
Brett-san,
I have one more question. Do you have ΨJT and ΨJB value of CSD18531Q5A? Please advise.
Regards,
Koide
Brett-san,
Thank you for the feedback. Do you have any Ψ data for the other Q5A package devices? I would like to use them for the reference.
Regards,
Koide
Koide-san,
This is not a common parameter in the FET industry and not something we have ever measured. Can you please provide a definition of the term?