Part Number: TPS3851
I understand that the watchdog timer is disabled when ISET1 pin is grounded. Then does it mean that timeout-counter is also reset?
Satoshi / Japan Disty
In reply to Michael DeSando1:
I'm asking just simple question. Is the internal counter reset when SET1 is changed from High to Low as attached?
In reply to S.Satoshi:
No. SET1 has no impact on the internal counter. The SET1 connects to an internal state machine which uses logic to disable the /WDO. The internal counter doesn't depend on SET1. When SET1 goes high and enables the watchdog, a 150-us setup time reinitializes the watchdog before checking any inputs on WDI.
Does this answer your question?
Thank you for your point. Let me ask one more question to clarify my understanding.
I understand that tWD is started at this point and also started to check WDI input (See attached). Is my understanding correct?
Your text in blue is correct. Please let me know if you have any more questions. Thank you!
All content and materials on this site are provided "as is". TI and its respective suppliers and providers of content make no representations about the suitability of these materials for any purpose and disclaim all warranties and conditions with regard to these materials, including but not limited to all implied warranties and conditions of merchantability, fitness for a particular purpose, title and non-infringement of any third party intellectual property right. TI and its respective suppliers and providers of content make no representations about the suitability of these materials for any purpose and disclaim all warranties and conditions with respect to these materials. No license, either express or implied, by estoppel or otherwise, is granted by TI. Use of the information on this site may require a license from a third party, or a license from TI.
TI is a global semiconductor design and manufacturing company. Innovate with 100,000+ analog ICs andembedded processors, along with software, tools and the industry’s largest sales/support staff.