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PCIe System Architecture

Hi all,

I have PCIe System with multiple endpoints, PCIe switches & a PCIe bridge.

I have a root complex at the top of the hierarchy.

Suppose a PCIe endpoint (say endpoint 1) wants to communicate with another PCIe endpoint (say endpoint 2).

Can these 2 endpoints communicate with each other by bypassing the CPU??

If yes could you please explain the data flow??

I have attached an image of the PCIe system.

  • Hi Mohnish,

    The PCI Express bus link supports full-duplex communication between any two endpoints, with no inherent limitation on concurrent access across multiple endpoints. Therefore the CPU bypassing is possible but the software working on the PCIe endpoints should be able to do such kind of communication.

    BR
    Tsvetolin Shulev