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Clock Design Tool / Delta Sigma Noise with Randomization set to 0%

Other Parts Discussed in Thread: LMX2492

I'm designing a PLL with the LMX2492.  I find that the PLL portion of the design does show a delta-sigma noise plot for any randomization greater than 0%.  I would have expected that the delta-sigma noise would have a shape similar to those in Figure 9 of AN1879 when the randomization is 0%.  But this setting seems to turn off the delta-sigma modulation entirely.


Is this a feature or a bug?

  • This is a feature and the tool is correct.  The application note assumes perfectly randomized noise of 100 percent.   If you use strong dithering and large fractions, this is true.   However, dithering can be disabled and the fractional noise is zero, only spurs.   For instance, using dithering for simple fractions not only adds noise, but doesn't help spurs either.

    Some competitors force large fractions and  dithering all the time, but we allow  exact fractions and allow dithering to be disables.Regards, 

    Dean

  • Thanks Dean -

    I appreciate your reply as I now better understand both how the part works and how the design tool works.


    Larry