AWR1443: Questions about LVDS configuration for test

Adam Yao94020

Part Number: AWR1443

Hi champion,
My customer is trying to connect AWR1443 with their own data capture board through LVDS. In debugging it with SDK 1_0_0_5, they have below questions. Could you help to check them?

1. How to set LVDS output lane? In SDK, the LVDS default output is 4 lane, while on their board, only 2 lanes are utilized. Is the only to change line 401 in Cbuff_lvsds.c the loop 4 to 2?

2. Bit map on different lane? Since chapter 4.1.4.1 in swra555 shows a example of 4 lane bit map for interleaved mode, so how it is with 2 lane only.

Thanks,
Adam

over 6 years ago

0 Akash Gondalia over 6 years ago

TI__Guru 50240 points

Hi Adam,

I'm not so sure about either of these questions but I will talk to my team and get back to you.

Cheers,
Akash

0 Jitendra Gupta over 6 years ago

TI__Guru 69070 points

Hello Adam,
Your requirement can be met with one change in AWR1443\capture-demo\main.c: initCfg.u.lvdsCfg.lvdsLaneEnable = 0x3U;

Enable these bits corresponding to which LVDS Lane you are using at external pin of device.

In cbuff_lvds.c#401 LVDS lane configuration happens based on above value.

Let us know if you face any issue with this change.

Regards,
Jitendra

0 Adam Yao94020 over 6 years ago in reply to Jitendra Gupta

TI__Genius 10910 points

Hi Jitendra,
Thanks. I am clear now.

Best regards,
Adam

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AWR1443: Questions about LVDS configuration for test