Hello guys,
According to Figure 8 on page13 in TMP100 datasheet (SBOS231I), it says that ACK by master is needed at the end of 1'st (for frame4) and 2'nd (for frame5) data byte reading of read register. But I think the ACK for 2'nd byte of read register is not needed in general. Is my understanding correct? Also is 1'st ACK by master needed? What is happened if the 1'st ACK for frame4 is not input (NAK is input)?
Your reply would be much appreciated.
Best regards,
Kazuya Nakai.
