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CC1175 PLL Unlock

Other Parts Discussed in Thread: CC1175

Dear Sir

We are trying to set the CC1175 with the setting below.

-       Crystal = 32MHz

-       Tx frequency = 915MHz (need to +/- 5ppm)

-       Tx Power = -6dBm

-       High Performance Mode

-       No Ramping

-       Continue Tx without modulation

This is the register values generated by SmartRF Studio7.

Register

Value

PA_CFG2

0x3f

CFM_DATA_CFG

0x01

MDMCFG0

0x0d

PKT_CFG0

0x20

PKT_CFG2

0x05

MDMCFG1

0x06

SERIAL_STATUS

0x08

PREAMBLE_CFG1

0x00

IOCFG2

0x08

AGC_CFG0

0xcf

AGC_CFG1

0xa9

AGC_CS_THR

0x19

AGC_REF

0x20

CFM_DATA_CFG

0x01

DCFILT_CFG

0x1c

FIFO_CFG

0x00

FREQ1

0x60

FREQ2

0x72

FREQOFF_CFG

0x22

FS_CAL0

0x0e

FS_CFG

0x12

FS_DIG0

0x5f

FS_DIG1

0x00

FS_DIVTWO

0x03

FS_DSM0

0x33

FS_DVC0

0x17

FS_PFD

0x50

FS_PRE

0x6e

FS_REG_DIV_CML

0x14

FS_SPARE

0xac

IF_MIX_CFG

0x00

IOCFG0

0x09

IOCFG1

0xb0

IOCFG2

0x08

IOCFG3

0xb0

IQIC

0xc6

MDMCFG0

0x05

MDMCFG1

0x06

PA_CFG2

0x0f

PKT_CFG0

0x20

PKT_CFG1

0x00

PKT_CFG2

0x05

PREAMBLE_CFG1

0x00

SERIAL_STATUS

0x08

SETTLING_CFG

0x03

SYNC_CFG1

0x0b

XOSC1

0x07

XOSC3

0xc7

XOSC5

0x0e

Our MCU program flow is show below.

1. Power up;

2. MCU send out Command Strobes "SRES";

3. MCU send out the register values above;

4. MCU send out Command Strobes "STX";

The result is the TX power is correct but the carrier frequency  is not 915MHz, it is about 768MHz and drifting.

We tried other Fs value setting but the output carrier frequency still hold on about 768MHz and drifting.

The PLL is totally unlock.

The PLL is locked until the register value of SETTLING_CFG change from 03H to 0BH.

Now the carrier frequency is 915.00020MHz with SETTLING_CFG = 0BH.

My questions are:

1. Why the PLL is locked with SETTLING_CFG = 03H on the SmartRF EVB and unlocked on our PCB?

2. Why the PLL is locked with SETTLING_CFG = 0BH on our PCB?

3. Should we keep to use SETTLING_CFG = 0BH in our application?

4. Do we need to do the VCO Calibration according to the errata?

5. What is the draw back if we do not do the VCO Calibration according to the errata? Because the carrier frequency is so accuracy now.

Thanks!

Zuy Ho

  • 1. Why the PLL is locked with SETTLING_CFG = 03H on the SmartRF EVB and unlocked on our PCB?

    SmartRF Studio runs the errata in the background.

    2. Why the PLL is locked with SETTLING_CFG = 0BH on our PCB?

    See 5

    3. Should we keep to use SETTLING_CFG = 0BH in our application?

    No

    4. Do we need to do the VCO Calibration according to the errata?

    Yes

    5. What is the draw back if we do not do the VCO Calibration according to the errata? Because the carrier frequency is so accuracy now.

    For version 2.1 of the chip the calibration has to be done according to the errata. Most of the time an auto calibration (SETTLING_CFG = 0x0B) will give the correct frequency but it not guarantied. In some cases the calibration will fail if auto cal is used and you will send on the wrong frequency and the chip will not be compliant with regulations. Use the chip as described in the errata.