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CC1200 GPIO setting for CC1190

Other Parts Discussed in Thread: CC1190, CC1200

Hi,

Our customer is using CC1200 + CC1190. We got several questions from them.

1. GPIO setting and sequence to interface CC1190.

As described on AN112, customer made a connection b/w CC1200 and CC1190 as below.

 - GPIO0:LNA Enable ("High" level while trasmitting)

 - GPIO2:PA Enable("High" level while reciving)

 - GPIO3:Mesh Interrupt

To contorl above GPIO's, what is the recommended register setting and sequence for CC1200? We are refering user guide, but above signals are not toggled.

2. Reset_N

What is minumum time for Reset signal?

3. Pull-up and Pull-down on IO

On CC1200, Is there any internal pull-up/down on IO? If yes, please let me know which PIN and resistor value?

Thanks in advance.

Regards,

 Fukui

  • 1) Set CC1200 onto RX/TX and then enable CC1190 LNA/PA

    2) We do not have any timing specification or characterization of the RESET_N pin. The RESET_N pin includes a Schmitt trigger to ensure we do not get internal glitches on the reset signal if the drive strength is weak. There is no intern pull-up or filtering of the signal.

    A conservative requirement will be to keep RESET_N low for minimum 100 us assuming a stable supply. If supply is being ramped the 100 us should be from when the supply is stable. 

    3) CC1200 does not have any internal pull-up/down on the GPIO pins

  • Hi Sverre,

    Thank you for your prpmpt reply.

    > 1) Set CC1200 onto RX/TX and then enable CC1190 LNA/PA

    If possible, could you to describe exact register setting?

    regards,

     Fukui

  • I believe the minimum reset time for CC1200 is ~2 clock cycles of the CC1200 clock.

    Set CC1200 in Tx/ Rx: Strobe STX or SRX

    Enable CC1190 LNA/ PA: See table 2 in the CC1190 datasheet. GPIOx_CFG = 51 according to table 10 in the CC1200 UserGuide (GPIOx_CFG=24/25 may also be used. Note: decimal, not hex numbers)

    When it fails to toggle, which settings have been used?