This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Testing Question for new PCB CC2640 BLE

Other Parts Discussed in Thread: CC2640

We developed a test application using the SmartRF06 and the CC2650EM_5X5 for BLE based on the SimpleBLEPeripheral  The project runs and can be debugged and stepped through.  Our target PCB uses a CC2640 5x5, so I did not change any project settings.

Problem:

1) Our new CC2640 PCB loads, and the XDS100v3 debugger is stepping through the program but we are not seeing any advertising packets. 

2) The current draw is 2mAmps.

3) I also loaded the SimpleBLEPeripheral app, and that appears to be running on the new PCB.

Question:  How can I verify that the CC2640 system is actually running the BLE tx-rx portion?  

Thanks,

Dan

  • Did you flash both the stack and the application?

    In SimpleBLEPeripheral the application receives messages from the GAP role task which ends up in SimpleBLEPeripheral_processStateChangeEvt.
    You can set breakpoints in the GAPROLE_STARTED/GAPROLE_ADVERTISING cases to check if you have started the stack and started to advertise correctly (Since you have disable the LCD you might need to add some code in there to avoid the cases to be optimized away=.

    Regards,
    Svend
  • Svend,

    I will check for the GAPROLE states and let you know how it goes.  Also, we are using an external regulator and not the internal DCDC.

    Also, I will remove the LCD calls with the global define for the CC2650EM_5XD.

    Thanks,

    Dan

  • Dan,

    How does your schematic look like, are you using the external regulator mode where all VDDS* and VDDR_* signals are connected together with VDDS_DCDC held to ground?

    In this mode the DC/DC does not disable automatically and you will also need to modify the CCFG (customer config) area in our example projects. See variables SET_CCFG_MODE_CONF_DCDC_RECHARGE / SET_CCFG_MODE_CONF_DCDC_ACTIVE for information.

    .:svend
  • Svend,
    The schematic does show VDDS2, VDDS, VDDR, and VDDR_RF tied together and DCDC_SW & VDDS_DCDC are tied to ground.
    I will disable using the defines in CCFG for SET_CCFG_MODE_CONF_DCDC_RECHARGE / SET_CCFG_MODE_CONF_DCDC_ACTIVE.

    Thanks,
    Dan
  • Svend,

    Thanks again! We got our board running, and also found that a 25MHz OSC was used instead of the 24MHz.

    Dan