This serves as a selection guide for our automotive-grade devices and outlines the typical protocols associated with these devices.
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SN74LVC1G66-Q1
SN74LVC2G66-Q1
TMUX7212…
Part Number: AM625 Other Parts Discussed in Thread: AM62P , AM62L
On different TI SITARA MPU SoCs, lets have a look at SoC wise cores which have access to the OSPI module/Controller in the current MCU+ SDK Software offering. Please refer the table below…
Part Number: AM625 Other Parts Discussed in Thread: SYSCONFIG
Lets have a look at the implementation of application using a TIMER module(DM TIMER) in Interupt mode of operation.
The application code can be used as it is or as a baseline for configuring…
Part Number: AM62D-Q1 Other Parts Discussed in Thread: AUDIO-AM62D-EVM
Hi TI experts,
I am planning to reuse the AM62D-Q1 AUDIO-AM62D-EVM schematics for my custom board design. I see the below schematic sections (pages) added to the AUDIO-AM62D-EVM…
Part Number: AM6421
Hello,
During a successful QSPI boot, I have captured the following signals: MCU_PORz, RESETSTATz, OSPI_CLK, OSPI_CS. I'm observing that roughly 35mS after RESETSTATz goe high it has a 160uS period where it drops low. Looking at…
Part Number: TDA4VH-Q1 Other Parts Discussed in Thread: TDA4VH
The high speed interfaces on the TDA4x share the SerDes lanes. The lanes can be muxed for different interfaces, but how can I configure them within Linux?
Part Number: AM2754-Q1 Other Parts Discussed in Thread: SYSCONFIG
In MCU+ SDK 11.02, the OSPI and Flash examples are configured by default to operate at the highest protocol: 8D-8D-8D. For configuring 8S-8S-8S SDR Protocol on S28HS512T Serial NOR OSPI…
Part Number: TDA4VH-Q1
Hi,
After reset of C7x, i am trying to load newer C7x binary, but the second load takes a lot of time.
Could you please help me to solve this issue.
