Part Number: AFE7900 My JESD & LMFS mode is JESD204B/24410,below is my problem:
1. If setting TX_LN_DATA_WIDTH is 32bit,What is the arrangement relationship of tx1_i0[15:0], tx1_q0[15:0] in tx_lane_data[31:0]?
2.If setting TX_LN_DATA_WIDTH is 64bit…
Part Number: AFE7900 For AFE7900, there is a function called adcRampTestPattern() that sends a ramp signal on ADC. However, I want to send a custom pattern on ADC. Is there any method available to do this?
Part Number: AFE7900 Other Parts Discussed in Thread: AFE7901 , , Hello,
I am currently architecturing a new system based on an AFE7901 and a Xilinx Zynq UltraScale+.
Our need is to record then playback RF signals with a bandwidth of 140 MHz, that are received…
Part Number: AFE7900 Hi Experts,
Seeking your assistance on this query from customer:
 How to sampling the central frequency using the AFE7900 board? I have tried to sample a central frequency at 1.6G, but there is no anything on your software.
The bringup flow and power sequence for the AFE79xx are given in section 9.2 of the AFE79xx Configuration Guide. Please access this in the AFE79xx secure folder.
As we have been contacted through email we will close this post and reply over…
Part Number: AFE7950 Other Parts Discussed in Thread: AFE7900 , Hi, Rob,
Long time no talk! Good to see you here in the forum!
I'm also looking for the AFE7900 S-parameters, and noticed that there is an AFE7950 s-par file on the secure site, but the TX…
Part Number: AFE7900EVM Other Parts Discussed in Thread: AFE7900 Hi Experts, Good day.
I use the AFE7900 EVM.
If my ADC has a minimum full-scale power of -2.9dBm and a maximum full-scale power of 16 dBm. Does this mean that the power of my input signal…