TI E2E support forums
TI E2E support forums
  • User
  • Site
  • Search
  • User
  • E2E™ design support >
  • Forums
    • Amplifiers
    • API solutions
    • Audio
    • Clock & timing
    • Data converters
    • DLP® products
    • Interface
    • Isolation
    • Logic
    • Microcontrollers
    • Motor drivers
    • Power management
    • Processors
    • RF & microwave
    • Sensors
    • Site support
    • Switches & multiplexers
    • Tools
    • Wireless connectivity
    • Archived forums
    • Archived groups
  • Technical articles
  • TI training
    • Tech days
    • Online training
    • Live events
    • Power Supply Design Seminar
  • Getting started
  • 简体中文
  • More
  • Cancel


Search tips
Showing 46 results View by: Thread Post Sort by
  • RE: CDCLVD1208 unused N-inputs

    Daniel Engeler
    Daniel Engeler
    Alfred Key said: The factory recommends to pull the unused differential input of the CDCLVD1208 to a status level by having a pull-dn on the P-input and a pull-up on the N-input. Matt Sunna said: The CDCLVD12xx input buffers do have hysterisis…
    • over 11 years ago
    • Clock & timing
    • Clock & timing forum
  • Answered
  • CDCLVD1208: State of the input will go to if the input connection is broken (unknown, High Z, valid/invalid ?)

    Kishen Someshwar
    Kishen Someshwar
    Resolved
    Part Number: CDCLVD1208 Hello Team, I have a customer who is using the CDCLVD1208 in their design and has reached out with the following question : For example, if the connection of positive signal of the differential pair (CLK_100_T/F) is somehow…
    • Resolved
    • over 8 years ago
    • Clock & timing
    • Clock & timing forum
  • Answered
  • CDCLVD1208 minimum frequency not stated in Datasheet

    Yoram%20Singer84
    Yoram%20Singer84
    Resolved
    Is the device DC operating?
    • Resolved
    • over 11 years ago
    • Clock & timing
    • Clock & timing forum
  • Answered
  • How to interface 3.3V LVCMOS XO output to CDCLVD1208 input?

    John11513
    John11513
    Resolved
    Other Parts Discussed in Thread: CDCLVD1208 Hi, My customer want to fanout 50MHz XO output to multiple loads through CDCLVD1208. However, their 50MHz XO is 3.3V LVCMOS output, while CDCLVD1208 can only accept 2.5V LVCMOS input. How should they do? I…
    • Resolved
    • over 11 years ago
    • Clock & timing
    • Clock & timing forum
  • Answered
  • CDCLVD1208 - VAC_REF pins

    Kawai
    Kawai
    Resolved
    Other Parts Discussed in Thread: CDCLVP1102 Please let me confirm how to treat the unused VAC_REF0/1 pins. Can I leave this pin open ? I have found the following thread, same question to CDCLVP1102. http://e2e.ti.com/support/clocks/f/48/t/115458.aspx…
    • Resolved
    • over 12 years ago
    • Clock & timing
    • Clock & timing forum
  • Answered
  • CDCLVD1208 Power Supply Operation

    David Escandon
    David Escandon
    Resolved
    Other Parts Discussed in Thread: CDCLVD1204 , CDCUN1208LP , SN65LVDS108 TI Team, I'd like to know if I can run the CDCLVD1208RHDT beyond 2.8V? Actually, I have 3.3V available. I know the datasheet say that 2.8V is the absolute maximum, but it would…
    • Resolved
    • over 13 years ago
    • Clock & timing
    • Clock & timing forum
  • Answered
  • CDCLVD1208 interface with FRQ,CLKE,100MHZ,50PPM,LVDS Oscillator

    Shalom Lavi
    Shalom Lavi
    Resolved
    Hi I use with CDCLVD 1208 as buffer clk 100Mhz 50ppm to FPGA and then to DDR3 ,one of the Oscillator not working well , when I by-pass the buffer and connect direct to FPGA it's working. in the past this Oscillator kind working well , other option…
    • Resolved
    • over 12 years ago
    • Clock & timing
    • Clock & timing forum
  • Answered
  • interfacing CDCLVD1208 to CDCE72010

    David Burton
    David Burton
    Resolved
    Other Parts Discussed in Thread: CDCE72010 , CDCLVD1208 Hi, I'm driving a CDCE72010 VCXO input with a DC coupled CDCLVD1208. I have placed an external 100 ohm termination, but it's location in the layout is not ideal. The route is about 1/2" long with…
    • Resolved
    • over 14 years ago
    • Clock & timing
    • Clock & timing forum
  • CDCLVD1208 - single ended use case and understanding datasheet jitter spec.

    Anjli Behl
    Anjli Behl
    Other Parts Discussed in Thread: CDCLVD1208 RE: CDCLVD1208 questions 1) I am not using the differential input 0, should I connect the inputs as follows : INP0 - 1K pull-up to 2.5V supply rail ? INN0 - 1K pull-down to ground? 2) The spec…
    • over 15 years ago
    • Clock & timing
    • Clock & timing forum
  • Answered
  • LMK1D1208: Recommended unused LVDS input termination

    Kazuhiko Hirano
    Kazuhiko Hirano
    Resolved
    Part Number: LMK1D1208 Other Parts Discussed in Thread: CDCLVD1208 , Hello, My customer would like to use either LMK1D1208 or CDCLVD1208. They plans to use it as 1 (IN1_P/IN1_N at LMK1D1208, INP1/INN1 at CDCLVD1208) to 8 LVDS in/out buffer. They would…
    • Resolved
    • over 4 years ago
    • Clock & timing
    • Clock & timing forum
<>

Didn't find what you are looking for? Post a new question.

  • Ask a new question