Hi Zschunke,
The internal biasing (optimal) on the XIN pin is 1.9V. While driving this input with a DC coupled 3.3V LVCMOS signal, the reference clock input threshold is around 1.65V (3.3/2) which is pretty close to this optimal internal bias and will…
What is the recommended connection for unused outputs when configured as LVDS? Should I just leave them floating or terminate them to a 100 Ohm resistor? When I measure the output voltage swing of the unterminated outputs it is pretty large. Also, will…
Other Parts Discussed in Thread: CDCM61002 , CDCM61004 , CDCM61001 , CDCE62005 , CDCM6208 Can you confirm that CDCM61002/CDCM61004 can get 23.63Mhz input, and provide output of 125.00Mhz?
Hi Brad,
I have some question about the chip of CDCM61002:
1.The input level of the chip is LVCMOS(3.3V), but Virtex-6 FPGA does not this standard. Can i directly drive the control signals of the CDCM61002,for example "OD0,OD1,OD2,RSTN..." through…
Hello Adrian,
Please first allow me to appologize. We must have overlooked your message and just now saw that it wasn't responded to yet.
Concerning your question, yes, connecting the 3.3V LVCMOS output directly to this 2.5V LVTTL input presents…
Other Parts Discussed in Thread: CDCM61002 Greetings,
hope some can comment: im seeing in EVM816x rev G schematic showing the CDCM61002 VCC_IN connected to the Analog power group(VCC_PLL) while Datasheet is recommending VCC_IN connected with VCC_OUT…
Other Parts Discussed in Thread: CDCM61002 , CDCV304
On my design, there are four TLK3101transceivers and two CDCM61002, one of CDCM61002 is for generating four 150MHZ LVCMOS clock sources to drive four TLK3101 transmit sides and the other CDCM61002…
Part Number: TDA4VE-Q1 Other Parts Discussed in Thread: AM2434 , CDCM61002 , CDCM61001 , LMK3H0102
Hi TI,
I'm working on a design which requires industrial ethernet (Profinet, EtherCAT, etc.) and real-time processing capabilities, in addition to higher…
Looking at the CDCM61002 datasheet it says:
"For proper device operation, the reference input must be stable at the start of VCO calibration. Since inputs from crystals or crystal oscillators can typically take up to 1-2ms to be stable, it is recommended…
