Because of the Thanksgiving holiday in the U.S., TI E2E™ design support forum responses may be delayed from November 25 through December 2. Thank you for your patience.
Hello Nate,
Specifically for OPA625, Figures 5, 6, 14, 15, 16 cover the effects of various load capacitors on the device. For better transient performance, you want minimal peaking in the frequency response which will correspond to less ringing or overshoot…
Part Number: DAC3164 Other Parts Discussed in Thread: DAC3162 Hello team,
Is the 500MSPS for DAC3164 per channel? What is the max data clock rate?
The part seems to be interleaved so I would think each channel would be 250MSPS? Does the same go for DAC3162…
Part Number: DAC3164 Other Parts Discussed in Thread: DAC3154 Hello,
I am trying to use the IO test feature of the DAC3164 to verify that the digital interface with an FPGA is functioning properly. I read this thread , which provides some information about…
Part Number: DAC3164 Other Parts Discussed in Thread: DAC3161 , DAC3174 .
Champs- got a customer who is bringing a board up and we have a few questions-
1. The config20 register allows setting allows the DAC output to be set to a static value. I expected…
Part Number: DAC3164 Other Parts Discussed in Thread: DAC3174 , , DAC3282 The datasheet for the DAC3164 seems a bit deficient. I was looking at the datasheet for the DAC3174, which seems to be a similar part (possibly the same die). It contains some specs…
Other Parts Discussed in Thread: DAC3164 Hi TI,
We are using a DAC3164 to generate complex baseband waveforms from an FPGA, going into a discrete integrated upconverter (ie, fairly standard software defined radio applications). We have the ability to produce…
Other Parts Discussed in Thread: DAC3164 , DAC3283 , DAC3171 , DAC3174 , DAC3154 Hi team,
We're interested in using the DAC3164 in our design and had a couple questions:
Most FPGAs guarantee Vod (output differential) of 250 mV. Looking at the datasheet…
Other Parts Discussed in Thread: DAC3164 From a customer:
"We would like a clarification regarding the DAC3164 which we are incorporating into one of our new designs. I understand that the SYNCP/SYNCN signal is to be used for multichip synchronization…
Hi Kang,
We are wanting to use the DAC3164, but I have the same questions - is the ALIGN input PECL or LVDS? Internally terminated or not? The data sheet is ambiguous. I want to drive with LVDS outputs - can I AC couple and supply common mode voltage? …
Other Parts Discussed in Thread: DAC3164 Hello
The digital latency=26us of DAC3164's data sheet is a mistake of the units. I think that digital latency is 26ns (13 clock period) in the case of data rate 500MSPS.
Best regards, Keishi,Nishijima Japan…
