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  dudi raviv1

  • 6 months ago
  • Data converters
  • Data converters forum

  DAC37J82EVM: TSW41J56

  • Resolved

  Part Number: DAC37J82EVM HI, we want to lock PLL2 in our evb. our parameters in the following
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  jim s

  • 4 months ago
  • Data converters
  • Data converters forum

  RE: ADS54J66: ADC analog input schematic

  RajK, This is incorrect. The output needs to be referenced to GND. See attached DAC37J82EVM schematic for reference. Regards, Jim 2235.DAC3XJ8XEVM-SCH_D.pdf
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  jim s

  • 5 months ago
  • Data converters
  • Data converters forum

  RE: DAC37J82EVM: DAC configuration for setting up loopback with ADS54J66.

  No. It can be downloaded from the link below. Regards, Jim txn.box.com/.../ifvfhxkhdrrz4nnwp2clqmd3ayb9nnvz
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  Branden Buckner

  • over 1 year ago
  • Data converters
  • Data converters forum

  RE: DAC37J82EVM: Synchronization time varies by 1 LMFC period

  Hi Kang, I tried modifying my sequence of commands before attempting synchronization like you suggested, adding in commands to reset the clock dividers before arming them. I didn't notice any difference in behavior though. I am indeed using a...
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  Branden Buckner

  • over 1 year ago
  • Data converters
  • Data converters forum

  RE: DAC37J82EVM: DAC attempts JESD link establishment on SYSREF falling edge

  So it turns out that the polarity invert functionality only applies to device clocks by design, as explained in this answer : e2e.ti.com/.../2875779 I suppose I can work around this issue by flipping the polarity of SYSREF at the FPGA input so that...
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  Branden Buckner

  • over 1 year ago
  • Data converters
  • Data converters forum

  RE: DAC37J82EVM: Link establishment fails during ILA sequence

  Good news! I was able to successfully establish a JESD link between the DAC and FPGA without the DAC ignoring the ILA today. The key was closely inspecting the link configuration data in the second multiframe of the ILA. I was able to find the details...
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  BobL

  • over 2 years ago
  • Data converters
  • Data converters forum

  DAC37J82EVM: DAC37J82EVM

  • Resolved

  Part Number: DAC37J82EVM Comrades, We purchased two of the DAC37J82EVM boards and a TSW14J56EVM
• 

  BobL

  • over 2 years ago
  • Data converters
  • Data converters forum

  DAC37J82EVM: TSW14J56EVM, DAC37J82EVM Programming

  • Resolved

  Part Number: DAC37J82EVM Please pardon my ignorance! I would like to generate a ~375MHz tone out
• 

  TylerQN

  • over 1 year ago
  • Data converters
  • Data converters forum

  DAC37J82EVM: Need proper config settings for LMK04828 and DAC37J82

  TI Thinks Resolved

  Part Number: DAC37J82EVM Hi, I'm using the DAC37J82EVM alongside an FPGA board. The clocking is set up as captured in the screenshot below. The DAC37J82 is set up in 4-2-1-1 mode and with K = 32. The config for both the LMK04828 and DAC37J82...
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  Branden Buckner

  • over 1 year ago
  • Clock & timing
  • Clock & timing forum

  LMK04828: Cannot Invert SDCLK Outputs

  • Resolved

  on a DAC37J82EVM board. The original motivation for inverting the SDCLK output is detailed in the related question

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