Other Parts Discussed in Thread: DRV3201-Q1 Hello,
Please advise functional mode of DRV3201-Q1(Sleep Mode or Active/Reset Mode) after EN and RSTN changed High to Low at the same time.
Best Regards.
Other Parts Discussed in Thread: DRV3201-Q1 , TPS65381-Q1 Hello,
Please answer following question from customer.
Figure 4-2. SPI Timing Parameters(TPS65381) and Figure 1. SPI Timing Parameters(DRV3201) shows that SCLK is low when NCS changes from high…
Hello,
Please confirm following my understanding is correct or not.
When boost undervoltage flag is not set in SPI status register 1 (STAT1), boost voltage is surely above VBOOST,UV (11 V to 11.9 V) in spite of another error is exist.
Best Regards…
Other Parts Discussed in Thread: DRV3201-Q1 Hello,
Please answer following questions.
Q1:
When DRV3201-Q1 is in Active Mode and internal temperature pass over Tmsd2, state changes to Global Reset.
Please advise if DRV3201-Q1 changes to Global Reset when…
Hello,
Please answer following questions from customer.
Q1: DRVOFF and GHS, SHS behavior
Customer observed VHS, GHSx and SHSx waveform when DRVOFF=High and results are follows.
(VS and VHS is different power supply and VS is always on following waveform…
Other Parts Discussed in Thread: DRV3201-Q1 Hello,
Please answer following question from customer.
Figure 1. SPI Timing Parameters shows that SCLK is low when NCS changes from high to low.
Please advise what will happen if SCLK is high when NCS changes…
Hello,
Please answer following question from customer.
Customer tries to change EN and B_EN from Low to High at the same time, and behavior of BOOST and ERR terminal is as follows.
Q1:
ERR terminal goes High to Low (BOOST UV error) after 1ms of rising…
Hello,
Please advise recommended startup and shutdown procedure like following example, and recommended register setup order.
<Example of startup>
VS: goes above 4.85V
RSTN: Low to High
EN: Low to High
B_EN: Low to High
…….…