Part Number: TDA4VE-Q1 Other Parts Discussed in Thread: TDA4VL Tool/software:
Code Composer Studio Version: 12.4.0.00007
OS: utuntu
[Start: Blackhawk XDS560v2-USB System Trace Emulator_0]
Execute the command:
%ccs_base%/common/uscif/dbgjtag…
Part Number: TRSF3232E Other Parts Discussed in Thread: SN65C3232E , MAX3232E , TRS3232E Tool/software: The part number TRSF3232E is declared as a 1Mbit/s RS232 transceiver, but at paragraph 9.2.1 (Design Requirements) is indicated that "• Maximum recommended…
Part Number: IWRL6432 Tool/software: Dear TI experts,
I have been trying to export Radar Cube continuously for IWRL6432Boost kit.
https://e2e.ti.com/support/sensors-group/sensors/f/sensors-forum/1403302/iwrl6432-exporting-the-radar-cube-over-uart…
Part Number: AFE7950 Tool/software: Hi David,
Related to my prior post:
I’d like you to review our planned re-spin to achieve deterministic latency in our system. We are using a single AFE7950 device connected via JESD to a single FPGA. We plan for…
Part Number: ADS42LB69 Tool/software: Dear support Team,
I would like to know if you could provide some INL plots for this ADC, i.e at 70 MHz-250 MS/s?
Additionally, does TI have a design support Tool to calculate and plot INL from a sine-wave ADC…
Hi Eddie,
I'm using the Blackhawk XDS560v2-USB System Trace Emulator to debug the onboard MCU. However, I’ve run into an issue when setting the target in Code Composer Studio (CCS) version 12.8.1. After configuring the target and attempting to verify…
I know you've closed this thread, but I thought I'd add some more (unsolicited) findings: I created a "dummy" .bss array which filled the unused SRAM (between the top of data and bottom of the (nominal) stack) with 0x55, and then stepped through the program…
Hi Aydin, Is there any specific adapter to be used, also I have soldering from Resister which is coming out of 60 pin connector and used XDS200 to connect with awrl1432 probe is accessable but during connecting with target gives some error. is it monitory…
Part Number: ADC14X250 Tool/software: Hi,
I am working with the ADC14X250RHBT and using Xilinx JESD204C & JESD204 PHY IP in my FPGA RTL project. While programming the ADC chip registers, I’ve noticed intermittent behavior with the JESD link-up status…
