TI E2E support forums
TI E2E support forums
  • User
  • Site
  • Search
  • User
  • E2E™ design support >
  • Forums
    • Amplifiers
    • Audio
    • Clock & timing
    • Data converters
    • DLP® products
    • Enterprise Automation Integration
    • Interface
    • Isolation
    • Logic
    • Microcontrollers
    • Motor drivers
    • Power management
    • Processors
    • RF & microwave
    • Sensors
    • Site support
    • Switches & multiplexers
    • Tools
    • Wireless connectivity
    • Archived forums
    • Archived groups
  • Technical articles
    • Analog
    • Automotive
    • DLP® technology
    • Embedded processing
    • Industrial
    • Power management
  • TI training
    • Tech days
    • Online training
    • Live events
    • Power Supply Design Seminar
  • Getting started
  • 简体中文
  • More
  • Cancel


Search tips
Showing 140 results View by: Thread Post Sort by
  • ADS1675: Clock Jitter/SNR Relational Graph

    Mitchell Moorehead
    Mitchell Moorehead
    TI Thinks Resolved
    Part Number: ADS1675 Good afternoon, We're looking at using the ADS1675 for our design but could not find a specification in the datasheet that shows the relationship between clock jitter tolerance and SNR. Are there additional resources that show…
    • 1 month ago
    • Data converters
    • Data converters forum
  • Answered
  • RE: ADS4225: CLKOUT Jitter and SNR

    Hideki Hayashi1
    Hideki Hayashi1
    Resolved
    Hi Yes...I'm confused about as you think. I understand the jitter is written by femto seconds. Thank you so much. Regards, Hideki
    • over 2 years ago
    • Data converters
    • Data converters forum
  • Answered
  • [FAQ] The relationship between SNR and ADC clock jitter

    Charles-Chen
    Charles-Chen
    Resolved
    Hi team, Why the clock jitter will affect the SNR of ADC? How to get the following equation?
    • Resolved
    • over 3 years ago
    • Data converters
    • Data converters forum
  • ADS131M04: Do you have any graph which shows relation between CLKIN jitter and SNR?

    Kazuya Nakai59
    Kazuya Nakai59
    TI Thinks Resolved
    Part Number: ADS131M04 Hello guys, One of my customers is considering using ADS131M04 for their new products. They want to use MSP430 clock output (8MHz) as ADS131M04 CLKIN. But the clockoutput has about +/-3% jitter. So they want to know how much SNR…
    • over 3 years ago
    • Data converters
    • Data converters forum
  • Answered
  • ADC12DJ3200QML-SP: SNR and clock jitter used in datasheet

    Jonathan Geronga
    Jonathan Geronga
    Resolved
    Part Number: ADC12DJ3200QML-SP Hi Team, We have a customer inquiry regarding figure 28 on page 29 of ADC12DJ3200QML-SP datasheet. 1. SNR is dependent on clock jitter. These are the measured results. 2. Do you know what the clock jitter is in these measurements…
    • Resolved
    • over 3 years ago
    • Data converters
    • Data converters forum
  • Answered
  • ADS4449: Input Clock Jitter Requirements

    Michael Spalluzzi
    Michael Spalluzzi
    Resolved
    Part Number: ADS4449 Other Parts Discussed in Thread: ADC08D1520 , How can I determine the maximum amount of jitter tolerable from my clock source? The datasheet just says to use a very low jitter clock source. I've looked at the ADC08D1520 which gives…
    • Resolved
    • 21 days ago
    • Data converters
    • Data converters forum
  • RE: ADS4149: jitter and skew requirement for input clock

    Chase W
    Chase W
    Hi Chi, To achieve datasheet performance metrics of this device the lowest jitter clocking source should be used. Please find the below articles useful. In particular, the first part contains the equations you will be interested in which show the degradation…
    • 10 days ago
    • Data converters
    • Data converters forum
  • Answered
  • RE: ADC3221EVM: Not working with TSW1400, "Clock from ADC EVM is not received by TSW board"

    Amy Weatherby
    Amy Weatherby
    Resolved
    Hi Yuan, The ADC jitter requirement can be found on page 47 of the datasheet (8.3.2.2 SNR and Clock Jitter). If you look at Figure 8-7, you can see how SNR degrades over input frequency due to external clock jitter. If you want the device to perform in…
    • 1 month ago
    • Data converters
    • Data converters forum
  • Answered
  • RE: ADC3422: adc3422 output data issue

    liping pan
    liping pan
    Resolved
    Hello Amy, This is measurement of clock and calcuation of Jitter & SNR. What's min requirement of SNR? Also do you have any recommendation of oscillator part numbers?
    • 1 month ago
    • Data converters
    • Data converters forum
  • RE: ADC12DJ3200QML-SP: Sampling clock phase noise requirements

    Rob Reeder
    Rob Reeder
    Hi Louis, See attached, this might help you in your analysis. I plugged in the numbers relative to the 3200-sp DS SNR numbers. As you can see, the jitter can get pretty high before there is a degradation in performance. Since your analog frequency band…
    • 1 month ago
    • Data converters
    • Data converters forum
>

Didn't find what you are looking for? Post a new question.

  • Ask a new question
About TI
Company News & events Investor relations Corporate citizenship Careers Contact us
Quick links
TI E2E™ design support forums Customer support center Packaging Quality & reliability TI university program myTI FAQ
Buying
Ordering resources Ordering help & FAQs BOM & cross reference tool Quick add to cart Authorized distributors
Connect with us

Texas Instruments has been making progress possible for decades. We are a global semiconductor company that designs, manufactures, tests and sells analog and embedded processing chips. Our products help our customers efficiently manage power, accurately sense and transmit data and provide the core control or processing in their designs.

Cookie policy Privacy policy Terms of sale Terms of use Trademarks Website feedback

© Copyright 1995-2023 Texas Instruments Incorporated. All rights reserved.