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Showing 12 results View by: Thread Post Sort by
    Answered
  • LMKDB1120: Is LDO integrated into clock buffer?

    Shunsuke Yamamoto
    Shunsuke Yamamoto
    Resolved
    Part Number: LMKDB1120 Other Parts Discussed in Thread: CDC3RL02 Hi team, Does LMKDB1120 include LDO like BAW oscillator does? If so, my customer can reduce the filter for power supply of LMKDB1120. Best regards, Shunsuke Yamamoto
    • Resolved
    • 20 days ago
    • Clock & timing
    • Clock & timing forum
  • LMKDB1120: LMKDB1120Z85NPPR spec question

    Janet Lin
    Janet Lin
    TI Thinks Resolved
    Part Number: LMKDB1120 Tool/software: Hi E2E, Could you kindly help to check the question from customer as below? I also loop customer in. What is the function of this pin? And what situation we need to enable it. BR, Janet
    • 4 months ago
    • Clock & timing
    • Clock & timing forum
  • Answered
  • LMKDB1120: PWRGD assertion before valid clock signal

    Maximilian Müllek
    Maximilian Müllek
    Resolved
    Part Number: LMKDB1120 Tool/software: Hello! What is the recommended way to handle the PWRGD signal if the PWRDN functionality is not used? The datasheet states the following: "The first low-to-high transition of the PWRGD pin after device power is on…
    • Resolved
    • 3 months ago
    • Clock & timing
    • Clock & timing forum
  • Answered
  • LMKDB1120: power down tolerant

    Naizeng Wang
    Naizeng Wang
    Resolved
    Part Number: LMKDB1120 Other Parts Discussed in Thread: LMKDB1113 , LMKDB1112 , LMKDB1108 , LMKDB1104 , LMKDB1102 Tool/software: Hi team, For below buffer, which can support power down tolerant? PDT stands for power down tolerance, which is usually…
    • Resolved
    • 8 months ago
    • Clock & timing
    • Clock & timing forum
  • LMKDB1120: Mid voltage level at address pins

    Duong Nguyen
    Duong Nguyen
    TI Thinks Resolved
    Part Number: LMKDB1120 Tool/software: Hi TI team, I would like to ask the Mid voltage on SDAR pin of LMKDB1120. If i want to config 0xC2 address, TI suggest left float pin SADR1 But in the our old design with DB2000QL, we have a external voltage…
    • over 1 year ago
    • Clock & timing
    • Clock & timing forum
  • LMKDB1120: the crack is exist between substrates and pad root of component

    Koo Richard
    Koo Richard
    TI Thinks Resolved
    Part Number: LMKDB1120 Wistron re-done 3A validation for another motherboad, the same location, PLMKDB1120NPPR, The engineers placed motherboard into inkwell, and then dry motherboard, engineer hard pull off this device from motherboard, result as below…
    • over 1 year ago
    • Clock & timing
    • Clock & timing forum
  • Answered
  • LMKDB1102: LMKDB12xx and LMKDB11xx default OE1# value, pull-up or pull-down?

    Zoltan Bardos
    Zoltan Bardos
    Resolved
    Part Number: LMKDB1102 Other Parts Discussed in Thread: LMKDB1202 , LMKDB1204 , LMKDB1104 , LMKDB1108 , LMKDB1120 Tool/software: Hello! I am looking at the LMKDB12xx and LMKDB11xx family (they share a datasheet), and I am confused about the default…
    • Resolved
    • 9 months ago
    • Clock & timing
    • Clock & timing forum
  • CDCDB803: Parallel Clock Buffer

    Johann Fort
    Johann Fort
    TI Thinks Resolved
    Part Number: CDCDB803 Other Parts Discussed in Thread: LMKDB1120 , Hello, I am looking to use two clock buffers in parallel with two CDCDB803 components. Inputs are connected to a PCIE Gen 4 clock Is this setup feasible? How can I optimize this…
    • over 2 years ago
    • Clock & timing
    • Clock & timing forum
  • RE: LMKDB1108: LOS# not going low

    vicente flores prado
    vicente flores prado
    Hi Link, Please refer to this thread. (+) LMKDB1120: PWRGD assertion before valid clock signal - Clock & timing forum - Clock & timing - TI E2E support forums This is very misleading, you're perfectly fine turning on the part before CLKIN is available…
    • 3 months ago
    • Clock & timing
    • Clock & timing forum
  • RE: LMK1C1102: High-level input voltage range

    Andrea Vallenilla
    Andrea Vallenilla
    Allen, I believe the LMKDB1xxx LP-HCSL buffer family may work since it oscillates around 0.4V so the V_IH level has to be lower than 0.8V. Note that most of our parts are meant to output a specific output type rather than stay within certain V_IH and…
    • over 1 year ago
    • Clock & timing
    • Clock & timing forum
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