Part Number: SN65LVDS104 Hello Team,
customer has a question about lvds buffering.
"We need to be able to drive four 100Ohm terminated receivers in a multidrop configuration. The termination is internal so not removable thus leads to a 25ohm termination…
Part Number: SN65LVDS104 When using the ibis model to simulate the SN65LVDS104 part in our system using HyperLynx, when simulating at fast-strong the output differential CM drops from 1.2V (what we see with slow-weak or nominal) to around 0.82V and the…
Part Number: SN65LVDS104 Other Parts Discussed in Thread: CDCLVD1213 , LMK00334 Hi All,
I was considering using the SN65LVDS104 for an LVDS clock distribution application. Do you have any parts similar to this, or any other LVDS repeaters or CLK distribution…
Part Number: SN65LVDS104 Hello,
Although it is obviously not best practice, do you see any major problem with having an idle/non-changing input (IN+ stays high, while IN- stays low) while the chip is in an un-powered state? This situation might be un…
Part Number: SN65LVDS104 Hi，all
The SN65LVDS104，unused LVDS output pairs can be floating(ENx=Low)？
and if ENx=High，unused output pairs floating,will introducing switching noise？Thanks。
regards,
guo
Part Number: SN65LVDS104 Other Parts Discussed in Thread: DS90LV012A Hello Team,
is it possible to use the SN65LVDS104 as a clockdistribution IC for a 25MHz reference clock with two differential and one single ended output where the SE output is connected…
Part Number: SN65LVDS104 Hi all Would you mind if we ask SN65LVDS104? Just in case, we aasume that there is no termination resistor 100ohm between A and B. Is our recognition correct? Kind regards, Hirotaka Matsumoto
Part Number: SN65LVDS104 Hi，all
There is no integrated 100ohm termination resistor between A and B inputs of SN65LVDS104 .
(1)The 100-Ω externalIs between A and B is necessary?
(2)If there is no 100-Ω external resistor between A and B，Can the chip work properly…
Part Number: SN65LVDS104 Hi team,
The customer needs to get the jitter time for SN65LVDS104. His clock frequency is 100MHZ.
His jitter requirement is 3 ps RMS. Figure 9 of the datasheet shows the jitter exceed 3ps when the clock frequency is 100MHZ, correct…
