Other Parts Discussed in Thread: SN65LVDS104 The SN65LVDS104 datasheet specifies the LVDS output parameters Differential output voltage magnitude (at 100 Ohms differential load) and Steady-state common-mode output voltage, and provides min and max values…
Other Parts Discussed in Thread: SN65LVDS104 Hi,
Customer would like to know the additive jitter for SN65LVDS104.
Would you provide the information ?
Best Regards,
Kato
Hello,
I am interfacing this IC with an FPGA which has 2.5v on the IO bank that is driving the LVDS. All of the Vcm and differential voltages are within spec of each other, so I understand that the LVDS driver on the FPGA will work with this IC.
However…
There are many fanout buffers like the SN65LVDS104; see this search .
Alternatively, use multiple buffers like the DS90LV001:
Alternatively, connect the output of a single-channel receiver to the inputs of a multi-channel transmitter or multiple transmitters…
Other Parts Discussed in Thread: SN65LVDS104 , DS15EA101 Please advise me on usage of SN65LVDS104 in AC coupling input mode.
When output of DS15EA101 is interfaced to DS65LVDS104 (as a fan out buffer) The output common mode level of DS15EA101 is ~2.9V which…
Other Parts Discussed in Thread: SN65LVDS104 Hi experts,
In one of our design, we are using sn65lvds104 to fan out a 125MHz LVDS clock signal.
The input come from a LVDS buffer and go to the sn65lvds104 through serial 0.1uF AC coupling and terminal differential…
Part Number: CDCLVD2102 Other Parts Discussed in Thread: SN65LVDS104 Hello,
My customer is looking for a solution for 1ch 72MHz 1.8V LVCMOS input to 2ch LVDS output buffer. CDCLVD2102's VIH is a little bit high for 1.8V LVCMOS. Do we have any good solution…
Other Parts Discussed in Thread: SN65LVDS104 I have a couple of questions regarding the SN65LVDS104:
I want to use it as a fan out buffer for a 148.5MHz clock, but the clock source is a 1.8V CML device. Can the input of the SN65LVDS104 accept this? Do…
Hi I.K.-san,
The input of SN65LVDS104 is LVTTL. Can the SN65LVDS104 support M-LVDS input?
Do you have any other idea for the following configuration?
- Input is LVDS
- 11 outputs LVDS (same input signal: any LVDS)
Thanks
Muk
