As far as the SRC4193 goes, it can definitely handle the above requirements. All you need to do is configure the IFMT[2:0] to '001' (24-bit I2S) and OFMT[1:0] to '00' (Left-justified) & OWL[1:0] to '01' (20-bit) and you will have achieved the results…
Part Number: SRC4193 Other Parts Discussed in Thread: SRC4392 Hi
Do you think that the SRC4193 could transfer DSD audio data in Bypass Mode? In datasheet is refered:
A bypass mode is included, which allows audio data to be passed directly from the input…
Other Parts Discussed in Thread: SRC4192 , SRC4193 I have designed my DAC using SRC4192. Now, I am using PIC24F to control SRC chip. For extra feature's like volume control and software mute I migrated to SRC4193. what things I need to consider to switch…
Other Parts Discussed in Thread: SRC4193 Hi,
I am using PIC24 SPI to communicate with SRC4193. How do you connect SPI interface only for write into SRC4193?. SPI need read signal to complete data transmission bt in SRC4193 there's no any CDATA_OUT?…
Other Parts Discussed in Thread: SRC4392 , SRC4193 How does the jitter rejection of the SRC4193 compare to that of the SRC4392. I do not need the SPDIF I/O of the SRC4392 but I do need the jitter rejection capability that is specified for the SRC4392. I…
Part Number: SRC4192 Other Parts Discussed in Thread: SRC4193 Hello,
1. As the datasheet shows RCKI input is required in Master mode, and RCKI is not needed at "Both Input and Output ports are Slave mode"
So, internal PLL can be clocked from…
Hi Justin-san,
Thank you for your support. Should the timing constraint for writing commands to the device be applied to both of SRC4192 and SRC4193 ? I believe that should be applied to SRC4193 only since that is mentioned on page 17 of the data sheet…
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Just stumbled on this: suddenly something that never made sense over a decade ago fell into place. I used the SRC4193 when it just got released and the datasheet didn't (still doesn't) mention the requirement for synchronous clocks for bypass mode, and…