Hi D0,
Yes, we recommend remaining within the stability table shown in the D/S for best stability.
You can asses stability using the spice models by applying a load step and observing the ringing: www.ti.com/.../slva381b.pdf
However, for an FPGA core…
Here is a reference design for the MAX10 that we just released: www.ti.com/.../TIDA-01366
But it seems that you want to operate the MAX10 in its lower performance, single supply mode?
For your OVP protection, I agree with Rakesh: we need to understand…
