Other Parts Discussed in Thread: TPS3430 Tool/software: Hi all,
Im testing a prototype PCB we have developed and we are using the TPS3430 as part of the circuitry. We send a pulse to the WDI input inside of a 1-10ms window to keep the output enable of…
Part Number: TPS3430-Q1 Tool/software: Hello Expert,
Could you please tell me pin status of WDO(pin8) during power is off?(e.g. Hi-z short-to-GND, weak pull-down, etc)
Our customer want to know this information for estimating abnormal condition's circuit…
Part Number: TPS3430-Q1 Tool/software: Hi Team,
In the datasheet, '8.2.2.1 Design Requirements - Design 2' mentions the maximum device current consumption. The max current is 200uA according to the design requirement, but in the design result the current…
Part Number: TPS3430-Q1 Tool/software: Hi team,
My customer has 2 questions regarding TPS3430-Q1's pin connection, can you help advise?
1. Are the SET0 and SET1 pins open-drain outputs? Do they need to have pull-up resistors when connected to a high…
Part Number: TPS3430 Hi team,
we had integrated tps3430 WWDOG timer, based on configuration:
and calculated tWDU=62.74ms, tWDL=7ms and tRST=0.70ms.
I'm implementing code in such a wat that after enabling WDOG using SETx pins(only possible condition…
Part Number: TPS3430-Q1 Hi team,
I've got several basic questions about WatchDog Timer, including:
1. When to use Internal WD, and when to use external WD? Why?
2. The key spec of WD Timer that customer pays attention to
Thanks a lot for your help…
Part Number: TPS3430 Hi team,
My customer has two questions regarding TPS3430, can you help advise?
1. In the datasheet, it shows that,
To achieve the latching watchdog feature, an open-drain buffer is connected from WDO to CRST with a small value capacitor…
Part Number: TPS3430-Q1 Other Parts Discussed in Thread: TPS3430 , Hi, Support Team
TPS3430_LHM_WDI have 3.3v, LHM_WDO_OUT will keep low.
if TPS3430_LHM_WDI dont have 3.3v, LHM_WDO_OUT will turn to Hign
schematic as below chart: have any concern?
also…
Part Number: TPS3430 the datasheet states "WDO delay time can be set to any value between 700 μs (CCRST = 100 pF) and 3.2 seconds (CCRST = 1 μF)"
I need at least 5s for reset. Is it really not possible to use a 2.2uF cap in CCRST?
tha…