Part Number: TPS3897 Hello:
Schematic is the following:
Timming is the fillowing:
My question is the following:
1. Whether output waveform will link with VCC ramp up Tr or not? If the ramp out is very fast, for example VCC going to 3.3V within 20us…
Part Number: TPS3897 Hello
When consider the delay time of TPS3897, I think the parasitism capacitance of pin of CT of TPS3897 need to be considered.
I would like to know the value, is it 1~2pf?
Part Number: TPS3897
We are using the TPS3897P with tpd(r) set to 5sec via capacitance.
When the device is powering up, we have SENSE coming up ahead of Vcc, then the ENABLE goes high about 200ms after VCC.
Since ENABLE is after SENSE and VCC…
Since the TPS3897 DS has provided the Vit+ for an under voltage detection device.
The highlighted values are the min, typ, and max for the Vit+, to de-assert RESET.
For the Vit-, Vsense to assert RESET, Vit- = Vit+ - Vhyst.
Vit-(min) = .49V…
Part Number: TPS3897 Hello TI expert
In AN snva845 figure 3, a JFET is used to mitigate the indeterminate output voltage.
I wonder why a JFET is used here. What's the key parameter for the JFET?
Is it possible to change it to MOSFET?
Thanks in advance…
Part Number: TPS3897 Hello Team,
Would you like to help me check the Ct range of tps3897? maybe we have one project need to set the delay time to several second, I am not sure this part has problem or not if using very large Ct.
Part Number: TPS3897 Hello E2E,
Is there any concern if we have Vsense on before VCC is applied for TPS3897? Or are we okay as long as table 7.3 is met regardless of if the device is powered or not?