Hi Betsy Varughese,
Sorry for late reply. Customer feedback below.
Since the schematic and boot log contain customer-confidential information, I have shared them with you separately via private chat rather than posting them in this public thread.…
Part Number: AM62A3-Q1
Hi TI Team,
We are evaluating the AM62A inter-core IPC communication from a functional safety perspective .
Could you please clarify what level of communication protection is already provided by the TI IPC mechanism and what…
Part Number: TMS320F28P650DK Hi,
W.r.t Intterupt groups and priorities listed in Section 3.4.5 of Tech. Ref Manual - SPRUIZ1B, where does IPC interrupt stand? I did not see it listed there or any information about it's mapping.
Thanks.
Part Number: AM5728 Hello TI team, In my yocto scarthgap buildsystem I am using meta-ti layer at commit 0e2876e2ea7c28ddff5bc0052bdbc83dd07b7c98. It contains ti-ipc 3.51.00.00 by default. Even when I append the ti-ipc recipe to bump ti-ipc to 3.52.00…
Part Number: TDA2P-ACD Query as below: Our implementation flow- Good case
System Power up
Core A15 starts and doing some CRC Validation
Core A15 waits for Core M40 to request the CRC Validation status
Core M40 turned ON lately…
Part Number: AM6422 Problem Description:
During the GOOSE message storm, the A53 core was under high network load and high CPU load. In the customer's topology, the A53 core was simultaneously receiving GOOSE messages via CPSW for stress testing and…
Part Number: J784S4XEVM
Hello,
I am building a custom Yocto image for MACHINE = "j784s4-evm" using Processor SDK Linux ADAS 11.02.01.03 . With the EVM device tree and standard Vision Apps overlays enabled, Linux reports:
OF: reserved mem: OVERLAP…
Part Number: AM62P We want to establish IPC interrupt with the AUTOSRA , but we don't know which Mailbox interrupt can be used. Can you provide some suggestion or example?