Other Parts Discussed in Thread: TXB0108 , SN74AVC16T245 , TXS0102 , SN74AVC16T245-Q1 Hi everyone,
I need a level shifter for a RMII bus. Bus contains one 50 MHz clock, and data signals that are synced with 50 MHz clock. Voltage of PHY side is 1.8V…
Other Parts Discussed in Thread: TXB0108 Goal
Translate from 3.3V to 1.8V.
Setup
VCCA = OE = 1.8V
VCCB = 3.3V
Scope observation
1.8V output signal not as expected, output not switching.
Questions
Q1. Assuming IIL/IIH > 20mA which…
Ruifeng Wang said:
Q1: Whether TXB0108ZXYR is good fit for this purpose?
Certainly, if the data rate through this level translator is <= 60Mbps. The datasheet for the TXB0108 indicates the maximum data rate. For Vcca=1.8V and Vccb=3.3V, the…
Hi Hang
Which SDK version are you using?
Also could you verify the state of ADC VREF switch as mentioned in the following picture taken from: AM263x Launchpad User Guide
Regards Akshit
Hello Ashish,
Please find the document, providing information on LP board.
Here it is specified that, ADC channels mentioned needs the MUX setting to get it enabled, in LP Board.
We shall confirm, same once again with our internal team again…
Part Number: LP-AM263 Other Parts Discussed in Thread: TPS22965 , LP-AM243
we are interfacing AM263 Launchpad with our Board.
whether it is possible to power ON the Launchpad with External Power Supply through BoosterPack Pin's (+5V >>J3.21 and J7…
Channamallesh,
The schematic is attached. FYI, the board design files can usually be found under the product folder on the TI website.
Regards,
Jim
TSW40RF82EVM-SCH_A.pdf
Haotian,
This is the pinout to the FMC connector on the board, not the FPGA. The XDC file uses the FPGA pinout. You can use this table along with the KC705 schematic to determine which pins are used by the FPGA.
Regards,
Jim
kc705_Schematic_xtp132_rev1_1…
vc707_Schematic_xtp135_rev1_0.pdf Thank you for your reply.But I do not know the specific function of SEQ.For example,there are three ucd9248 in schematic of vc707 evaluation kit.I found that the SEQ-1 and SEQ-2 of all chips are connected together while…
