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TLV3604: require IBIS model

Yubing
Intellectual 465 points

Part Number: TLV3604

Hi team,

I would like to performe a signal integrity simulation since the rise/fall time of the part is so short. Can you provide me with an IBIS model of the part?

Or you can inform me of a spice-to-IBIS conversion tool. s2ibis2/3 seems obsolete.

Thanks.

Yubing

  • 0
    TI__Mastermind 26720 points

    Yubing

    Thanks for your post.  Unfortunately we do not have an IBIS model for the device and our ability to create such a model has diminished.  I will see what can be done but I cannot promise providing such a model in the near future.  In regards to the tool, I am not familiar with it.  From my experience in creating such models in the past, it is difficult for me to imagine such a conversion tool.  I think the best thing we could offer is to provide some additional information about input and output parasitics that could potentially be added to a simulation.  These would be package and die specific but I am not sure I have access to this information.  Please allow me a couple days to see what I can discover and I will post any findings.

    Chuck

  • 0 in reply to Chuck Sins
    Intellectual 465 points

    Thanks Chuck.

  • 0 in reply to Yubing
    TI__Mastermind 26720 points

    Yubing

    Sorry to inform you that my assumption about being able to provide an IBIS model quickly ended up being correct. Since I am unable to provide the model at this moment, is there anything else I can provide to assist you in the design of your system.  One good learning to share about achieving performance on the device is to minimize parasitic capacitance on the input PADs to allow input voltage to be as sharp as possible (pass through the switching threshold as cleanly as possible).  Minimizing output capacitance also helps.  In addition to making our traces with controlled impedance, we also make sure that the ground pours that surround the input and output traces have a separation of 3x to 4x the width of the traces themselves.  In the meantime, I will continue to seek resources for the creation of IBIS models but this is more in the months range and not days or a week unfortunately.  Sorry for having to ask but how much does this hurt you in moving forward with your design?  Will you be able to proceed without the model.  We do have an EVM if that would help and we can provide design files as well.

    Chuck

  • 0 in reply to Chuck Sins
    Intellectual 465 points

    Chuck

    I will follow the general layout guidance you have suggested. Thanks.

    It's OK without an IBIS model for the current design, since the input/output traces are electrically short in layout. In theory, I don't have to worry about SI issues, but I just want to be sure. However, I will choose a part with an IBIS model next time if possible, so that I can perform an SI simulation.

    I am wondering why TI provide SPICE models for digital devices such as comparators, inverters, fan-out buffers, etc.? I think IBIS models are more pupular with digital designs.

    Yubing

  • +1 in reply to Yubing
    TI__Mastermind 26720 points

    thanks Yubing for being understanding

    In regards to providing SPICE models for comparators, we have found that most of the challenges in using a comparator are analog input related.  It is not very frequent that we have many concerns with our digital output.  I think that is why it is more common for us to have the SPICE model.  And once again, sorry I was not able to accommodate your IBIS model request.

    Chuck

  • 0 in reply to Chuck Sins
    Intellectual 465 points
    Chuck Sins said:
    the challenges in using a comparator are analog input related

    Hi Chuck,

    Can you elaborate why the analog input are challenging? I am confused.

    Yubing

  • +1 in reply to Yubing
    TI__Mastermind 26720 points

    Yubing

    this is more of a generalization for comparators but we experience more design challenges on the analog front end of circuits than the digital output of our comparators.  Specs like offset, common mode range, bias current, overdrive dispersion all come to mind.  It is not to say that the output of comparators is simple but customers seem to need more help verifying their analog inputs to comparators than appropriate logic levels and signal integrity at the output.

    Chuck

  • 0 in reply to Chuck Sins
    Intellectual 465 points

    Thanks Chuck. It really helps me a lot.