LMH5401-SP: Function and implementation of 15pin

Hello Ryotaro-san,

This is a good question: the datasheet does not focus on this thermal pad or discuss pad 15 within the layout section.

1) No, the thermal pad GND vias are not directly connected internally to pins 11 & 14. 

- The die attach connecting the thermal pad (pin 15) to the die is not a metallic short; the resistance of the attachment is several kOhms.  The thermal pad dissipates heat from the IC; the vias carry heat away from the thermal pad into the GND plane.  

'Pin 15' is part of the LCCC 14-pin ceramic package design and was added for thermal considerations.  As a resource, TI has an available document titled "QFN and SON PCB Attachment"; this document describes the implementation of thermal vias and thermal pads for certain device packages.

2) I recommend implementing pin 15 by checking that there is an internal GND plane for the vias to contact beneath the IC.  

- On the companion LMH5401-SP EVM the five vias on the pad are connected to two solid (no cut-outs) internal GND planes.  There is not an additional fill or pour on the top layer; the thermal pad on the IC and thermal land pad on the PCB make full contact only with each other.  The vias to the GND planes accomplish the connection to GND for the thermal pad.  I recommend looking at these GND layers (layers 2 & 5) of the six-layer board for the EVM.  This document will help complete the picture.

On the LH5401-SP datasheet, within the Layout Guidelines (Section 12.1), the recommendation is to not cut away the GND layer underneath the LMH5401-SP.  While other high speed amplifiers may recommend cutting out the GND plane beneath the device, the LMH5401-SP has on-chip resistors and is much more susceptible to parasitic inductance than parasitic capacitance.  I would recommend having solid (or very few cut-outs away from IC) internal GND planes/layers for these thermal pad vias to contact.   

Please let me know if I can explain this better or find another example.

Best,

Alec